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Harald Neubauer
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2000 – 2009
- 2009
- [c9]José Ángel Díaz-Madrid, Harald Neubauer, Hans Hauer, Ginés Doménech-Asensi, Ramón Ruiz Merino:
Power reduction of a 12-bit 40-MS/s pipeline ADC exploiting partial amplifier sharing. DATE 2009: 369-373 - [c8]Johannes Uhlig, René Schüffny, Harald Neubauer, Johann Hauer, Joachim Haase:
A low-power continuous-time incremental 2nd-order-MASH ΣΔ-modulator for a CMOS imager. ICECS 2009: 33-36 - 2008
- [c7]I. E. Martin, Ana Rusu
, Mohammed Ismail, Harald Neubauer, Johann Hauer:
A flexible algorithmic ADC for wireless sensor nodes. ICECS 2008: 1213-1216 - 2007
- [c6]Werner Magnes, Matthias Oberst, Aris Valavanoglou, Ulrich Reichold, Harald Neubauer, Hans Hauer, Peter Falkner:
A 92dB-DR 13mW ΔΣ Modulator for Spaceborn Fluxgate Sensors. ISSCC 2007: 388-610 - 2005
- [c5]Juan M. Carrillo
1.8-V second-order ΣΔ modulator in 0.18-μm CMOS technology. ECCTD 2005: 197-200 - [c4]Paula López
Practical considerations on doughnut transistors design. ECCTD 2005: 213-216 - [c3]Paula López
Performance analysis of high-speed MOS transistors with different layout styles. ISCAS (4) 2005: 3688-3691 - 2003
- [c2]Jonny Johansson, Harald Neubauer, Hans Hauer:
A 16-bit 60μW multi-bit ΣΔ modulator for portable ECG applications. ESSCIRC 2003: 161-164 - 2001
- [c1]Harald Neubauer, Thomas Desel, Hans Hauer:
A successive approximation A/D converter with 16 bit 200 kS/s in 0.6 μm CMOS using self calibration and low power techniques. ICECS 2001: 859-862
Coauthor Index
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