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Lev Kirischian
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2020 – today
- 2024
- [c22]Gvarami Labartkava, Nurin Binti Suhaimi, Thiago Silva, Lev Kirischian:
Autonomously Reconfigurable Robot Coupled with Intelligent Vision and Control System for Rapid Runtime Adaptation. AIIoT 2024: 429-434 - 2021
- [j10]Dimple Sharma
, Lev Kirischian
A Decision-Making Method Providing Sustainability to FPGA-Based SoCs by Run-Time Structural Adaptation to Mode of Operation, Power Budget, and Die Temperature Variations. Int. J. Reconfigurable Comput. 2021: 5512938:1-5512938:29 (2021) - [j9]Dimple Sharma
A Method for Run-Time Prediction of On-Chip Thermal Conditions in Dynamically Reconfigurable SOPCs. Int. J. Reconfigurable Comput. 2021: 8818788:1-8818788:20 (2021) - 2020
- [c21]Vadim Geurkov, Lev Kirischian:
A Unified Method of Designing Signature Analyzers for Digital and Mixed-Signal Circuits Testing. ITC 2020: 1-5
2010 – 2019
- 2019
- [c20]Dimple Sharma, Valeri Kirischian, Lev Kirischian:
On-Chip Thermal Balancing using Dynamic Structural Adaptation of FPGA-Based Multi-task SoPCs for Space-Borne Applications. AHS 2019: 79-86 - 2018
- [j8]Dimple Sharma, Lev Kirischian, Valeri Kirischian:
Run-Time Mitigation of Power Budget Variations and Hardware Faults by Structural Adaptation of FPGA-Based Multi-Modal SoPC. Comput. 7(4): 52 (2018) - [c19]Lev Kirischian, Valeri Kirischian, Dimple Sharma:
Mitigation of Thermo-cycling effects in Flip-chip FPGA-based Space-borne Systems by Cyclic On-chip Task Relocation. AHS 2018: 17-24 - 2017
- [c18]Dimple Sharma, Lev Kirischian, Valeri Kirischian:
Run-time adaptation method for mitigation of hardware faults and power budget variations in space-borne FPGA-based systems. AHS 2017: 32-39 - [c17]Dimple Sharma, Victor Dumitriu, Lev Kirischian:
Architecture Reconfiguration as a Mechanism for Sustainable Performance of Embedded Systems in case of Variations in Available Power. ARC 2017: 177-186 - 2016
- [j7]Victor Dumitriu, Lev Kirischian, Valeri Kirischian:
Run-Time Recovery Mechanism for Transient and Permanent Hardware Faults Based on Distributed, Self-Organized Dynamic Partially Reconfigurable Systems. IEEE Trans. Computers 65(9): 2835-2847 (2016) - [j6]Victor Dumitriu, Lev Kirischian:
SoPC Self-Integration Mechanism for Seamless Architecture Adaptation to Stream Workload Variations. IEEE Trans. Very Large Scale Integr. Syst. 24(2): 799-802 (2016) - 2015
- [c16]Victor Dumitriu, Lev Kirischian, Valeri Kirischian:
Mitigation of variations in environmental conditions by SoPC architecture adaptation. AHS 2015: 1-8 - 2014
- [j5]Vadim Geurkov
On the Use of an Algebraic Signature Analyzer for Mixed-Signal Systems Testing. VLSI Design 2014: 465907:1-465907:8 (2014) - [c15]Victor Dumitriu, Lev Kirischian, Valeri Kirischian:
Decentralized run-time recovery mechanism for transient and permanent hardware faults for space-borne FPGA-based computing systems. AHS 2014: 47-54 - [c14]Vadim Geurkov
Designing of an algebraic signature analyzer for mixed-signal systems. NEWCAS 2014: 165-168 - 2013
- [c13]Victor Dumitriu, Lev Kirischian:
SoC self-integration mechanism for dynamic reconfigurable systems based on collaborative macro-function units. ReConFig 2013: 1-7 - 2012
- [c12]Victor Dumitriu, Lev Kirischian, Valeri Kirischian:
A framework for adaptive reconfigurable space-borne computing platforms for run-time self-recovery from transient and permanent hardware faults. AHS 2012: 280-287 - [c11]David Diaz, Victor Dumitriu, Lev Kirischian:
Cost-performance analysis of component architectural designs for Dynamic Partially Reconfigurable Systems. CCECE 2012: 1-6 - 2010
- [j4]Victor Dumitriu, Lev Kirischian:
A framework of embedded reconfigurable systems based on re-locatable virtual components. Int. J. Embed. Syst. 4(3/4): 182-194 (2010) - [j3]Pil Woo Chun, Lev Kirischian:
Architecture synthesis methodology for cost-effective run-time reconfigurable systems. Int. J. Embed. Syst. 4(3/4): 225-234 (2010) - [j2]Lev Kirischian, Victor Dumitriu, Pil Woo Chun, Galina Okouneva:
Mechanism of Resource Virtualization in RCS for Multitask Stream Applications. Int. J. Reconfigurable Comput. 2010: 159367:1-159367:13 (2010)
2000 – 2009
- 2009
- [c10]Pil Woo Chun, Lev Kirischian:
Architecture Synthesis Methodology for Run-Time Reconfigurable Systems. CSE (2) 2009: 903-908 - [c9]Victor Dumitriu, Dennis Marcantonio, Lev Kirischian:
Run-Time Component Relocation in Partially-Reconfigurable FPGAs. CSE (2) 2009: 909-914 - [c8]Lev Kirischian, Victor Dumitriu, Pil Woo Chun:
Virtualization of Computing Resources in RCS for Multi-task Stream Applications. ReConFig 2009: 368-373 - 2008
- [j1]Valeri Kirischian, Vadim Geurkov
Macro-programmable reconfigurable stream processor for collaborative manufacturing systems. J. Intell. Manuf. 19(6): 723-734 (2008) - [c7]Valeri Kirischian, Vadim Geurkov
A multi-mode video-stream processor with cyclically reconfigurable architecture. Conf. Computing Frontiers 2008: 105-106 - [c6]Pil Woo Chun, Jamin Islam, Valeri Kirischian, Lev Kirischian:
Improving Cost-Effectiveness Using a Micro-level Static Architecture for Stream Applications. DELTA 2008: 368-373 - 2006
- [c5]Pil Woo Chun, Lev Kirischian:
A Framework for a Dynamically Reconfigurable System in a Parallel Multi-Tasking Environment. FPL 2006: 1-2 - 2004
- [c4]Lev Kirischian, Irina Terterian, Pil Woo Chun, Vadim Geurkov:
Re-Configurable Parallel Stream Processor with Self-Assembling and Self-Restorable Micro-Architecture. PARELEC 2004: 165-170 - 2002
- [c3]Fayez Chayab, Lev Kirischian, Lucas Szajek:
Architecture-to-Task Optimization System (ATOS) for Parallel Multi-Mode Data-Flow Architectures on a Base of a Partially Reconfigurable Computing Platform. PARELEC 2002: 27-32 - 2000
- [c2]Lev Kirischian:
Optimization of Parallel Task Execution on the Adaptive Reconfigurable Group Organized Computing System. PARELEC 2000: 100-105 - [c1]Lucas Szajek, Lev Kirischian:
Implementation of an Adaptive Reconfigurable Group Organized (ARGO) Parallel Architecture. PARELEC 2000: 150-154
Coauthor Index
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