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Jérémie Crenne
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2020 – today
- 2022
- [c20]Hugues Almorin, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo, Vincent Kissel:
High-throughput FFT architectures using HLS tools. ICECS 2022 2022: 1-4 - [c19]Logan Saint-Germain, Bertrand Le Gal, Fabien Baldacci, Jérémie Crenne, Christophe Jégo, Sebastien Loty:
Methodology to Adapt Neural Network on Constrained Device at Topology level. SiPS 2022: 1-6 - 2021
- [c18]Maël Tourres, Cyrille Chavet, Bertrand Le Gal, Jérémie Crenne, Philippe Coussy:
Extended RISC-V hardware architecture for future digital communication systems. 5GWF 2021: 224-229 - [c17]Yassine Faize, Jérémie Crenne, Nicolas Hanusse, Christophe Jégo:
An Energy Efficient and Scalable Node Architecture for Sensor Network. NEWCAS 2021: 1-4 - 2020
- [j5]Yann Delomier, Bertrand Le Gal
, Jérémie Crenne, Christophe Jégo:
Model-based Design of Hardware SC Polar Decoders for FPGAs. ACM Trans. Reconfigurable Technol. Syst. 13(2): 10:1-10:27 (2020) - [j4]Yann Delomier, Bertrand Le Gal
Model-Based Design of Flexible and Efficient LDPC Decoders on FPGA Devices. J. Signal Process. Syst. 92(7): 727-745 (2020)
2010 – 2019
- 2019
- [c16]Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo:
Generation of Efficient Self-adaptive Hardware Polar Decoders Using High-Level Synthesis. SiPS 2019: 242-247 - 2018
- [c15]Jonathan Déchelotte, Russell Tessier, Dominique Dallet, Jérémie Crenne:
Lynq: A Lightweight Software Layer for Rapid SoC FPGA Prototyping. FPL 2018: 372-375 - [c14]Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo:
From multicore LDPC decoder implementations to FPGA decoder architectures: a case study. ICECS 2018: 89-92 - [c13]Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo:
Fast Design of Reliable, Flexible and High-Speed AWGN architectures with High Level Synthesis. ICECS 2018: 661-664 - [c12]Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo:
Model-based Design of Efficient LDPC Decoder Architectures. ISTC 2018: 1-5 - 2014
- [j3]Bertrand Le Gal, Christophe Jégo, Jérémie Crenne:
A High Throughput Efficient Approach for Decoding LDPC Codes onto GPU Devices. IEEE Embed. Syst. Lett. 6(2): 29-32 (2014) - [c11]Jonathan Piat, Jérémie Crenne:
Modeling dynamic partial reconfiguration in the dataflow paradigm. SiPS 2014: 298-303 - 2013
- [j2]Deepak Unnikrishnan, Ramakrishna Vadlamani, Yong Liao, Jérémie Crenne, Lixin Gao, Russell Tessier:
Reconfigurable Data Planes for Scalable Network Virtualization. IEEE Trans. Computers 62(12): 2476-2488 (2013) - [j1]Jérémie Crenne, Romain Vaslin, Guy Gogniat
Configurable memory security in embedded systems. ACM Trans. Embed. Comput. Syst. 12(3): 71:1-71:23 (2013) - 2012
- [c10]Pascal Cotret, Jérémie Crenne, Guy Gogniat
Bus-based MPSoC Security through Communication Protection: A Latency-efficient Alternative. FCCM 2012: 200-207 - [c9]Florian Devic, Lionel Torres, Jérémie Crenne, Benoît Badrignans, Pascal Benoit:
SecURe DPR: Secure update preventing replay attacks for dynamic partial reconfiguration. FPL 2012: 57-62 - [c8]Pascal Cotret, Guy Gogniat
Lightweight reconfiguration security services for AXI-based MPSoCs. FPL 2012: 655-658 - 2011
- [c7]Jérémie Crenne, Pascal Cotret, Guy Gogniat
Efficient key-dependent message authentication in reconfigurable hardware. FPT 2011: 1-6 - [c6]Pascal Cotret, Jérémie Crenne, Guy Gogniat
Distributed Security for Communications and Memories in a Multiprocessor Architecture. IPDPS Workshops 2011: 326-329 - 2010
- [c5]Guy Gogniat, Jorgiano Vidal, Linfeng Ye, Jérémie Crenne, Sébastien Guillet, Florent de Lamotte, Jean-Philippe Diguet, Pierre Bomel:
Self-reconfigurable Embedded Systems: From Modeling to Implementation. ERSA 2010: 84-96 - [c4]Deepak Unnikrishnan, Ramakrishna Vadlamani, Yong Liao, Abhishek Dwaraki, Jérémie Crenne, Lixin Gao, Russell Tessier:
Scalable network virtualization using FPGAs. FPGA 2010: 219-228
2000 – 2009
- 2009
- [c3]Pierre Bomel, Jérémie Crenne, Linfeng Ye, Jean-Philippe Diguet, Guy Gogniat
Ultra-Fast Downloading of Partial Bitstreams through Ethernet. ARCS 2009: 72-83 - [c2]Jean-Philippe Diguet, Linfeng Ye, Yvan Eustache, Jérémie Crenne, Pierre Bomel, Guy Gogniat, Jorgiano Vidal, Florent de Lamotte:
Networked Self-adaptive Systems: An Opportunity for Configuring in the Large. ERSA 2009: 81-90 - 2008
- [c1]Pierre Bomel, Jean-Philippe Diguet, Guy Gogniat
Bitstreams Repository Hierarchy for FPGA Partially Reconfigurable Systems. ISPDC 2008: 228-234
Coauthor Index
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