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Niccolò Battezzati
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2010 – 2019
- 2012
- [c11]Niccolò Battezzati, Stefano Colazzo, M. Maffione, L. Senepa:
SURF algorithm in FPGA: A novel architecture for high demanding industrial applications. DATE 2012: 161-162 - 2011
- [b1]Niccolò Battezzati, Luca Sterpone
, Massimo Violante:
Reconfigurable Field Programmable Gate Arrays for Mission-Critical Applications. Springer 2011, ISBN 978-1-4419-7594-2, pp. I-VII, 1-220 - 2010
- [c10]Luca Sterpone, Niccolò Battezzati:
A new placement algorithm for the mitigation of multiple cell upsets in SRAM-based FPGAs. DATE 2010: 1231-1236 - [c9]Luca Sterpone
On the mitigation of SET broadening effects in integrated circuits. DDECS 2010: 36-39 - [c8]Cristiana Bolchini
An integrated flow for the design of hardened circuits on SRAM-based FPGAs. ETS 2010: 214-219 - [c7]Niccolò Battezzati, Davide Serrone, Massimo Violante:
A new framework for the automatic insertion of mitigation structures in circuits netlists. IOLTS 2010: 190-191 - [c6]Niccolò Battezzati, Luca Sterpone
A new software tool for static analysis of SET sensitiveness in Flash-based FPGAs. VLSI-SoC 2010: 79-84
2000 – 2009
- 2009
- [c5]Niccolò Battezzati, Filomena Decuzzi, Luca Sterpone
Soft errors in Flash-based FPGAs: Analysis methodologies and first results. FPL 2009: 723-724 - [c4]Niccolò Battezzati, Filomena Decuzzi, Massimo Violante, Michel Briet:
Application-oriented SEU sensitiveness analysis of Atmel rad-hard FPGAs. IOLTS 2009: 89-94 - 2008
- [c3]Luca Sterpone
A Novel Design Flow for the Performance Optimization of Fault Tolerant Circuits on SRAM-based FPGA's. AHS 2008: 157-163 - [c2]Luca Sterpone
A new placement algorithm for the optimization of fault tolerant circuits on reconfigurable devices. WREFT@CF 2008: 347-352 - [c1]Niccolò Battezzati, Simone Gerardin, Andrea Manuzzato, Alessandro Paccagnella
On the Evaluation of Radiation-Induced Transient Faults in Flash-Based FPGAs. IOLTS 2008: 135-140
Coauthor Index
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