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Tomohiko Ito
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2020 – today
- 2022
- [j11]Tomohiko Ito, Teruyoshi Kaneko, Yoshiki Tanaka, Sato Saga:
An interactive sketch-based CAD interface realizing geometrical and topological editing across multiple objects based on fuzzy logic. Comput. Graph. 103: 153-167 (2022) - 2021
- [c6]Tomohiko Ito, Teruyoshi Kaneko, Yoshiki Tanaka, Sato Saga:
Over-sketching Operation to Realize Geometrical and Topological Editing across Multiple Objects in Sketch-based CAD Interface. IUI Companion 2021: 49-51 - 2020
- [j10]Ten Watanabe, Tomohito Yoshikawa, Tomohiko Ito, Yuto Miwa, Takeshi Shibata, Sato Saga:
An infinite-resolution grid snapping technique based on fuzzy theory. Appl. Soft Comput. 89: 106112 (2020)
2010 – 2019
- 2013
- [j9]Toshiya Mitomo, Yukako Tsutsumi, Hiroaki Hoshino, Masahiro Hosoya, Tong Wang, Yuta Tsubouchi, Ryoichi Tachibana, Akihide Sai, Yuka Kobayashi, Daisuke Kurose, Tomohiko Ito, Koichiro Ban, Tomoya Tandai, Takeshi Tomizawa:
Correction to "A 2 Gb/s Throughput CMOS Transceiver Chipset With In-Package Antenna for 60 GHz Short-Range Wireless Communication". IEEE J. Solid State Circuits 48(6): 1540 (2013) - 2012
- [j8]Toshiya Mitomo, Yukako Tsutsumi, Hiroaki Hoshino, Masahiro Hosoya, Tong Wang, Yuta Tsubouchi, Ryoichi Tachibana, Akihide Sai, Yuka Kobayashi, Daisuke Kurose, Tomohiko Ito, Koichiro Ban, Tomoya Tandai, Takeshi Tomizawa:
A 2-Gb/s Throughput CMOS Transceiver Chipset With In-Package Antenna for 60-GHz Short-Range Wireless Communication. IEEE J. Solid State Circuits 47(12): 3160-3171 (2012) - [c5]Toshiya Mitomo, Yukako Tsutsumi, Hiroaki Hoshino, Masahiro Hosoya, Tong Wang, Yuta Tsubouchi, Ryoichi Tachibana, Akihide Sai, Yuka Kobayashi, Daisuke Kurose, Tomohiko Ito, Koichiro Ban, Tomoya Tandai, Takeshi Tomizawa:
A 2Gb/s-throughput CMOS transceiver chipset with in-package antenna for 60GHz short-range wireless communication. ISSCC 2012: 266-268 - [c4]Daisuke Miyashita, Kenichi Agawa, Hirotsugu Kajihara, Kenichi Sami, Masaomi Iwanaga, Yosuke Ogasawara, Tomohiko Ito, Daisuke Kurose, Naotaka Koide, Toru Hashimoto, Hiroki Sakurai, Takafumi Yamaji, Takashi Kurihara, Kazumi Sato, Ichiro Seto, Hiroshi Yoshida, Ryuichi Fujimoto, Yasuo Unekawa:
A -70dBm-sensitivity 522Mbps 0.19nJ/bit-TX 0.43nJ/bit-RX transceiver for TransferJet™ SoC in 65nm CMOS. VLSIC 2012: 74-75 - 2010
- [j7]Tomohiko Ito, Tetsuro Itakura:
A 0.9-V 12-bit 40-MSPS Pipeline ADC for Wireless Receivers. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(2): 395-401 (2010)
2000 – 2009
- 2008
- [j6]Takeshi Ueno, Tomohiko Ito, Daisuke Kurose, Takafumi Yamaji, Tetsuro Itakura:
1.2 V, 24 mW/ch, 10 bit, 80 MSample/s Pipelined A/D Converters. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(2): 454-460 (2008) - [j5]Tomohiko Ito, Daisuke Kurose, Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura:
55-mW, 1.2-V, 12-bit, 100-MSPS Pipeline ADCs for Wireless Receivers. IEICE Trans. Electron. 91-C(6): 887-893 (2008) - 2006
- [j4]Tomohiko Ito, Daisuke Kurose, Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura:
Low-Power Design of 10-bit 80-MSPS Pipeline ADCs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(7): 2003-2008 (2006) - [j3]Daisuke Kurose, Tomohiko Ito, Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura:
55-mW 200-MSPS 10-bit pipeline ADCs for wireless receivers. IEEE J. Solid State Circuits 41(7): 1589-1595 (2006) - [c3]Takeshi Ueno, Tomohiko Ito, Daisuke Kurose, Takafumi Yamaji, Tetsuro Itakura:
A 1.2 V, 24 mW/ch, 10 bit, 80 MSample/s Pipelined A/D Converters. CICC 2006: 501-504 - 2005
- [j2]Tomohiko Ito, Takeshi Ueno, Daisuke Kurose, Takafumi Yamaji, Tetsuro Itakura:
A 10-bit, 200-MSPS, 105-mW pipeline A-to-D converter. IEICE Electron. Express 2(15): 429-433 (2005) - [c2]Daisuke Kurose, Tomohiko Ito, Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura:
55-mW 200-MSPS 10-bit pipeline ADCs for wireless receivers. ESSCIRC 2005: 527-530 - 2004
- [j1]Tomohiko Ito, Takafumi Yamaji, Daisuke Kurose, Tetsuro Itakura:
Capacitance Mismatch Evaluation for Low-power Pipeline ADC Design. IEICE Electron. Express 1(3): 63-68 (2004)
1990 – 1999
- 1994
- [c1]Tomohiko Ito:
Transition from two-word to multiple-word stage in the course of language acquisition. ICSLP 1994: 1707-1710
Coauthor Index
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