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Nizar Dahir
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2020 – today
- 2022
- [j7]Ammar Karkar, Nizar Dahir, Terrence S. T. Mak, Kin-Fai Tong:
Thermal and Performance Efficient On-Chip Surface-Wave Communication for Many-Core Systems in Dark Silicon Era. ACM J. Emerg. Technol. Comput. Syst. 18(3): 49:1-49:18 (2022) - 2021
- [j6]Nizar Dahir, Ammar Karkar, Maurizio Palesi, Terrence S. T. Mak, Alex Yakovlev:
Power density aware application mapping in mesh-based network-on-chip architecture: An evolutionary multi-objective approach. Integr. 81: 342-353 (2021)
2010 – 2019
- 2018
- [j5]Ammar Karkar, Terrence S. T. Mak, Nizar Dahir, Ra'ed Al-Dujaily, Kin-Fai Tong, Alex Yakovlev:
Network-on-Chip Multicast Architectures Using Hybrid Wire and Surface-Wave Interconnects. IEEE Trans. Emerg. Top. Comput. 6(3): 357-369 (2018) - 2017
- [c11]Indar Sugiarto, Pedro B. Campos, Nizar Dahir, Gianluca Tempesti, Steve B. Furber:
Optimized task graph mapping on a many-core neuromorphic supercomputer. HPEC 2017: 1-7 - [c10]Pedro B. Campos, Nizar Dahir, Martin Trefzer, Andy M. Tyrrell, Gianluca Tempesti:
LeAF: A low-overhead asymmetric frequency controller for NoC router interconnects. VLSI-SoC 2017: 1-6 - 2016
- [c9]Haider Alrudainy, Andrey Mokhov, Nizar S. Dahir, Alex Yakovlev:
MEMS-based power delivery control for bursty applications. ISCAS 2016: 790-793 - [c8]Pedro B. Campos, Nizar Dahir, Colin Bonney, Martin Trefzer, Andy M. Tyrrell, Gianluca Tempesti:
XL-STaGe: A cross-layer scalable tool for graph generation, evaluation and implementation. SAMOS 2016: 354-359 - [c7]Colin Bonney, Pedro B. Campos, Nizar Dahir, Gianluca Tempesti:
Fault tolerant task mapping on many-core arrays. SSCI 2016: 1-8 - 2015
- [c6]Nizar Dahir, Pedro B. Campos, Gianluca Tempesti, Martin Trefzer, Andrew M. Tyrrell:
Characterisation of feasibility regions in FPGAs under adaptive DVFS. FPL 2015: 1-4 - 2014
- [j4]Nizar Dahir, Terrence S. T. Mak, Fei Xia, Alexandre Yakovlev:
Modeling and Tools for Power Supply Variations Analysis in Networks-on-Chip. IEEE Trans. Computers 63(3): 679-690 (2014) - [j3]Nizar Dahir, Ra'ed Al-Dujaily, Terrence S. T. Mak, Alex Yakovlev:
Thermal Optimization in Network-on-Chip-Based 3D Chip Multiprocessors Using Dynamic Programming Networks. ACM Trans. Embed. Comput. Syst. 13(4s): 139:1-139:25 (2014) - [c5]Ammar Karkar, Nizar Dahir, Ra'ed Al-Dujaily, Kenneth Tong, Terrence S. T. Mak, Alex Yakovlev:
Hybrid wire-surface wave architecture for one-to-many communication in networks-on-chip. DATE 2014: 1-4 - [c4]Nizar Dahir, Ghaith Tarawneh, Terrence S. T. Mak, Ra'ed Al-Dujaily, Alex Yakovlev:
Design and Implementation of Dynamic Thermal-Adaptive Routing Strategy for Networks-on-Chip. PDP 2014: 384-391 - 2013
- [j2]Nizar Dahir, Terrence S. T. Mak, Ra'ed Al-Dujaily, Alex Yakovlev:
Highly adaptive and deadlock-free routing for three-dimensional networks-on-chip. IET Comput. Digit. Tech. 7(6): 255-263 (2013) - [j1]Ra'ed Al-Dujaily, Nizar Dahir, Terrence S. T. Mak, Fei Xia, Alex Yakovlev:
Dynamic programming-based runtime thermal management (DPRTM): An online thermal control strategy for 3D-NoC systems. ACM Trans. Design Autom. Electr. Syst. 19(1): 2:1-2:27 (2013) - 2012
- [c3]Nizar Dahir, Terrence S. T. Mak, Fei Xia, Alex Yakovlev:
Minimizing power supply noise through harmonic mappings in networks-on-chip. CODES+ISSS 2012: 113-122 - [c2]Nizar Dahir, Ra'ed Al-Dujaily, Alex Yakovlev, Petros Missailidis, Terrence S. T. Mak:
Deadlock-free and plane-balanced adaptive routing for 3D networks-on-chip. NoCArc@MICRO 2012: 31-36 - 2011
- [c1]Nizar Dahir, Terrence S. T. Mak, Alex Yakovlev:
Communication centric on-chip power grid models for networks-on-chip. VLSI-SoC 2011: 180-183
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