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Vinod Ganesan
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2020 – today
- 2023
- [i7]Nikhilesh Singh
, Vinod Ganesan, Chester Rebeiro:
A Survey of Security Concerns and Countermeasures in Modern Micro-architectures with Transient Execution. CoRR abs/2305.16251 (2023) - [i6]Pradyumna YM, Vinod Ganesan, Dinesh Kumar Arumugam, Meghna Gupta, Nischith Shadagopan, Tanay Dixit, Sameer Segal, Pratyush Kumar, Mohit Jain, Sriram Rajamani:
PwR: Exploring the Role of Representations in Conversational Programming. CoRR abs/2309.09495 (2023) - 2022
- [j2]Vinod Ganesan
Design and Scaffolded Training of an Efficient DNN Operator for Computer Vision on the Edge. ACM Trans. Embed. Comput. Syst. 21(6): 72:1-72:29 (2022) - [i5]Vinod Ganesan, Anwesh Bhattacharya
Efficient ML Models for Practical Secure Inference. CoRR abs/2209.00411 (2022) - 2021
- [c6]Pranav U. Gadikar
Generalized Weight Agnostic Neural Networks for Configurable and Continual Autonomous Systems. AIMLSystems 2021: 6:1-6:7 - [c5]Vishal Gupta, Vinod Ganesan, Biswabandan Panda:
Seclusive Cache Hierarchy for Mitigating Cross-Core Cache and Coherence Directory Attacks. DATE 2021: 637-640 - [c4]Surya Selvam, Vinod Ganesan, Pratyush Kumar:
FuSeConv: Fully Separable Convolutions for Fast Inference on Systolic Arrays. DATE 2021: 651-656 - [i4]Surya Selvam, Vinod Ganesan, Pratyush Kumar:
FuSeConv: Fully Separable Convolutions for Fast Inference on Systolic Arrays. CoRR abs/2105.13434 (2021) - [i3]Vinod Ganesan, Pratyush Kumar:
Design and Scaffolded Training of an Efficient DNN Operator for Computer Vision on the Edge. CoRR abs/2108.11441 (2021) - [i2]Vinod Ganesan, Gowtham Ramesh, Pratyush Kumar:
SuperShaper: Task-Agnostic Super Pre-training of BERT Models with Variable Hidden Dimensions. CoRR abs/2110.04711 (2021) - 2020
- [j1]Rahul Bodduna
Brutus: Refuting the Security Claims of the Cache Timing Randomization Countermeasure Proposed in CEASER. IEEE Comput. Archit. Lett. 19(1): 9-12 (2020) - [c3]Vinod Ganesan, Sanchari Sen, Pratyush Kumar, Neel Gala, Kamakoti Veezhinathan, Anand Raghunathan
Sparsity-Aware Caches to Accelerate Deep Neural Networks. DATE 2020: 85-90 - [c2]Muhammad Arsath K. F, Vinod Ganesan
PARAM: A Microprocessor Hardened for Power Side-Channel Attack Resistance. HOST 2020: 23-34 - [c1]Vinod Ganesan
A Case for Generalizable DNN Cost Models for Mobile Devices. IISWC 2020: 169-180
2010 – 2019
- 2019
- [i1]Muhammad Arsath K. F, Vinod Ganesan, Rahul Bodduna, Chester Rebeiro:
PARAM: A Microprocessor Hardened for Power Side-Channel Attack Resistance. CoRR abs/1911.08813 (2019)
Coauthor Index
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