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Andreas Lööw
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2020 – today
- 2024
- [j1]Andreas Lööw, Daniele Nantes-Sobrinho, Sacha-Élie Ayoun, Caroline Cronjäger, Nat Karmios, Petar Maksimovic, Philippa Gardner:
Compositional Symbolic Execution for Correctness and Incorrectness Reasoning (Artifact). Dagstuhl Artifacts Ser. 10(2): 13:1-13:2 (2024) - [c9]Andreas Lööw, Daniele Nantes-Sobrinho
, Sacha-Élie Ayoun, Caroline Cronjäger, Petar Maksimovic, Philippa Gardner:
Compositional Symbolic Execution for Correctness and Incorrectness Reasoning. ECOOP 2024: 25:1-25:28 - [c8]Andreas Lööw, Daniele Nantes-Sobrinho
Matching Plans for Frame Inference in Compositional Reasoning. ECOOP 2024: 26:1-26:20 - [i2]Andreas Lööw, Daniele Nantes-Sobrinho, Sacha-Élie Ayoun, Caroline Cronjäger, Petar Maksimovic, Philippa Gardner:
Compositional Symbolic Execution for Correctness and Incorrectness Reasoning (Extended Version). CoRR abs/2407.10838 (2024) - 2023
- [c7]Petar Maksimovic, Caroline Cronjäger, Andreas Lööw, Julian Sutherland, Philippa Gardner:
Exact Separation Logic: Towards Bridging the Gap Between Verification and Bug-Finding. ECOOP 2023: 19:1-19:27 - [c6]Ning Dong, Roberto Guanciale, Mads Dam, Andreas Lööw:
Formal Verification of Correctness and Information Flow Security for an In-Order Pipelined Processor. FMCAD 2023: 247-256 - 2022
- [c5]Andreas Lööw:
Reconciling Verified-Circuit Development and Verilog Development. FMCAD 2022: 1-10 - [c4]Andreas Lööw:
A small, but important, concurrency problem in Verilog's semantics? (Work in progress). MEMOCODE 2022: 1-6 - [i1]Petar Maksimovic, Caroline Cronjäger, Julian Sutherland, Andreas Lööw, Sacha-Élie Ayoun, Philippa Gardner:
Exact Separation Logic. CoRR abs/2208.07200 (2022) - 2021
- [c3]Andreas Lööw:
Lutsig: a verified Verilog compiler for verified circuit development. CPP 2021: 46-60
2010 – 2019
- 2019
- [c2]Andreas Lööw, Magnus O. Myreen:
A proof-producing translator for verilog development in HOL. FormaliSE@ICSE 2019: 99-108 - [c1]Andreas Lööw, Ramana Kumar, Yong Kiam Tan, Magnus O. Myreen, Michael Norrish
Verified compilation on a verified processor. PLDI 2019: 1041-1053
Coauthor Index
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last updated on 2024-10-07 21:21 CEST by the dblp team
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