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Hasini Witharana
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2020 – today
- 2024
- [j6]Hasini Witharana, Hansika Weerasena, Prabhat Mishra:
Formal Verification of Virtualization-Based Trusted Execution Environments. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(11): 4262-4273 (2024) - [j5]Hasini Witharana
, Aruna Jayasena
Incremental Concolic Testing of Register-Transfer Level Designs. ACM Trans. Design Autom. Electr. Syst. 29(3): 55:1-55:23 (2024) - [c5]Hasini Witharana, Daniel Volya, Prabhat Mishra:
QcAssert: Quantum Device Testing with Concurrent Assertions. ASPDAC 2024: 491-496 - [c4]Hasini Witharana, Debapriya Chatterjee, Prabhat Mishra:
Verifying Memory Confidentiality and Integrity of Intel TDX Trusted Execution Environments. HOST 2024: 44-54 - 2023
- [j4]Hasini Witharana
Automated Generation of Security Assertions for RTL Models. ACM J. Emerg. Technol. Comput. Syst. 19(1): 8:1-8:27 (2023) - [c3]Hasini Witharana
Dynamic Refinement of Hardware Assertion Checkers. DATE 2023: 1-6 - [i2]Hasini Witharana
Sequence-Based Incremental Concolic Testing of RTL Models. CoRR abs/2302.12241 (2023) - [i1]Hasini Witharana
quAssert: Automatic Generation of Quantum Assertions. CoRR abs/2303.01487 (2023) - 2022
- [j3]Hasini Witharana
A Survey on Assertion-based Hardware Verification. ACM Comput. Surv. 54(11s): 225:1-225:33 (2022) - [j2]Aruna Jayasena
Network-on-Chip Trust Validation Using Security Assertions. J. Hardw. Syst. Secur. 6(3-4): 79-94 (2022) - [c2]Hasini Witharana
Speculative Load Forwarding Attack on Modern Processors. ICCAD 2022: 144:1-144:9 - 2021
- [j1]Hasini Witharana
Directed Test Generation for Activation of Security Assertions in RTL Models. ACM Trans. Design Autom. Electr. Syst. 26(4): 26:1-26:28 (2021)
2010 – 2019
- 2018
- [c1]Darshana Buddhika, Ranula Liyadipita, Sudeepa Nadeeshan, Hasini Witharana
Domain Specific Intent Classification of Sinhala Speech Data. IALP 2018: 197-202
Coauthor Index
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