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Andleeb Zahra
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2020 – today
- 2024
- [j3]Bhartipudi Sahishnavi, Arnab Dey, Anubhab Banerjee, Andleeb Zahra, Zia Abbas
:
A 275 pW, 0.5 V supply insensitive gate-leakage based current/voltage reference circuit for a wide temperature range of -55 to 100 °C without using amplifiers and resistors. Microelectron. J. 150: 106277 (2024) - [c10]Bhartipudi Sahishnavi, Samriddhi Agarwal, Shameer Basha Yerragudi, Naveen Dasari, Andleeb Zahra, Prabhakar Bhimalapuram, Syed Azeemuddin, Zia Abbas:
An inductor-less, cost-effective On-chip CMOS VNA for bio-molecule detection. ISCAS 2024: 1-5 - 2023
- [j2]Mohammed Salman Ahmed, Md. Kalesha, Andleeb Zahra, Zia Abbas
Approximate Toom-Cook FFT with sparsity aware error tuning in a shared memory architecture. Integr. 89: 94-105 (2023) - [j1]Deepthi Amuru
AI/ML algorithms and applications in VLSI design and technology. Integr. 93: 102048 (2023) - [c9]Deepthi Amuru, Andleeb Zahra, Varnika Karakuram, Zia Abbas:
Design of Approximate Full Adders for Error Resilient Applications. ICCA 2023: 1-6 - [c8]Ashutosh Pathy, Andleeb Zahra, Amir Ahmad, Zia Abbas:
A High PSRR CMOS Voltage and Current Reference in One Circuit Without Amplifier for Low Power Applications. ICM 2023: 276-279 - [c7]Swarnim Sinha, Andleeb Zahra, Imran Siddiqui, Pawan Kumar, Alimpan Modak, Prabhakar Bhimalapuram, Tapan Sau, Syed Azeemuddin
A Label-Free Low-Cost Radio Frequency Driven Noninvasive Lab-on-Chip System for Creatinine Detection. ICST 2023: 1-4 - [c6]Andleeb Zahra, Giampiero de Cesare, Domenico Caputo
Design and Fabrication of Microfluidic Chip for Temperature Control Applications in Biomedical. ICST 2023: 1-6 - 2022
- [i1]Deepthi Amuru, Harsha V. Vudumula, Pavan K. Cherupally, Sushanth R. Gurram, Amir Ahmad, Andleeb Zahra, Zia Abbas:
AI/ML Algorithms and Applications in VLSI Design and Technology. CoRR abs/2202.10015 (2022) - 2021
- [c5]Hema Sai Kalluru, Prasenjit Saha, Andleeb Zahra, Zia Abbas
Algorithm Driven Power-Timing Optimization Methodology for CMOS Digital Circuits Considering PVTA Variations. ISCAS 2021: 1-5 - [c4]Hema Sai Kalluru, Prasenjit Saha, Andleeb Zahra, Zia Abbas
PVT and Aging Degradation Invariant Automated Optimization Approach for CMOS Low-Power High-Performance VLSI Circuits. ISQED 2021: 1-6
2010 – 2019
- 2019
- [c3]Shirisha Gourishetty, Harshini Mandadapu, Andleeb Zahra, Zia Abbas
A Highly Accurate Machine Learning Approach to Modelling PVT Variation Aware Leakage Power in FinFET Digital Circuits. APCCAS 2019: 61-64 - [c2]Deepthi Amuru
Statistical Variation Aware Leakage and Total Power Estimation of 16 nm VLSI Digital Circuits Based on Regression Models. VDAT 2019: 565-578 - 2018
- [c1]Zia Abbas
LEADER: Leakage Currents Estimation Technique for Aging Degradation Aware 16 nm CMOS Circuits. VDAT 2018: 394-407
Coauthor Index
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