default search action
Hossein Valavi
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2022
- [j3]Hongyang Jia
, Murat Ozatay
Scalable and Programmable Neural Network Inference Accelerator Based on In-Memory Computing. IEEE J. Solid State Circuits 57(1): 198-211 (2022) - 2021
- [c7]Hongyang Jia, Murat Ozatay
A Programmable Neural-Network Inference Accelerator Based on Scalable In-Memory Computing. ISSCC 2021: 236-238 - [c6]Jinseok Lee, Hossein Valavi, Yinqi Tang, Naveen Verma:
Fully Row/Column-Parallel In-memory Computing SRAM Macro employing Capacitor-based Mixed-signal Computation with 5-b Inputs. VLSI Circuits 2021: 1-2 - 2020
- [b1]Hossein Valavi:
Hardware acceleration to address the costs of data movement. Princeton University, USA, 2020 - [j2]Hongyang Jia
A Programmable Heterogeneous Microprocessor Based on Bit-Scalable In-Memory Computing. IEEE J. Solid State Circuits 55(9): 2609-2621 (2020) - [c5]Hossein Valavi, Sulin Liu, Peter J. Ramadge:
Revisiting the Landscape of Matrix Factorization. AISTATS 2020: 1629-1638 - [i2]Hossein Valavi, Sulin Liu, Peter J. Ramadge:
The Landscape of Matrix Factorization Revisited. CoRR abs/2002.12795 (2020)
2010 – 2019
- 2019
- [j1]Hossein Valavi
A 64-Tile 2.4-Mb In-Memory-Computing CNN Accelerator Employing Charge-Domain Compute. IEEE J. Solid State Circuits 54(6): 1789-1799 (2019) - [c4]Hossein Valavi, Peter J. Ramadge:
Multi-dataset Low-rank Matrix Factorization. CISS 2019: 1-5 - [c3]Hongyang Jia, Hossein Valavi, Yinqi Tang, Jintao Zhang, Naveen Verma:
A Programmable Embedded Microprocessor for Bit-scalable In-memory Computing. Hot Chips Symposium 2019: 1-29 - 2018
- [c2]Hossein Valavi, Peter J. Ramadge:
An Upper-Bound on the Required Size of a Neural Network Classifier. ICASSP 2018: 2356-2360 - [c1]Hossein Valavi, Peter J. Ramadge, Eric Nestler, Naveen Verma:
A Mixed-Signal Binarized Convolutional-Neural-Network Accelerator Integrating Dense Weight Storage and Multiplication for Reduced Data Movement. VLSI Circuits 2018: 141-142 - [i1]Hongyang Jia, Yinqi Tang, Hossein Valavi, Jintao Zhang, Naveen Verma:
A Microprocessor implemented in 65nm CMOS with Configurable and Bit-scalable Accelerator for Programmable In-memory Computing. CoRR abs/1811.04047 (2018)
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-08-23 18:30 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: