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Lukas Sommer
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2020 – today
- 2024
- [c27]Ettore Tiotto, Victor Perez, Whitney Tsang, Lukas Sommer, Julian Oppermann, Victor Lomüller, Mehdi Goli, James Brodman:
Experiences Building an MLIR-Based SYCL Compiler. CGO 2024: 399-410 - [c26]Victor Perez, Victor Lomüller
, Lukas Sommer
On Demand Specialization of SYCL Kernels with Specialization Constant Length Allocations (SCLA). IWOCL 2024: 21:1-21:2 - [c25]Hyesun Hong, Lukas Sommer, Bongjun Kim, Mikhail Kashkarov, Kumudha Narasimhan, Ilya Veselov, Mehdi Goli, Jaeyeon Kim, Ruymán Reyes Castro, Hanwoong Jung:
Programming Model Extensions for General-Purpose Processing-In-Memory. ISC 2024: 1-11 - 2023
- [j4]Victor Perez, Lukas Sommer
User-driven Online Kernel Fusion for SYCL. ACM Trans. Archit. Code Optim. 20(2): 21:1-21:25 (2023) - [c24]Victor Perez
Technical Talk: A SYCL Extension for User-Driven Online Kernel Fusion. IWOCL 2023: 19:1-19:2 - [c23]Victor Perez
Leveraging MLIR for Better SYCL Compilation (Poster). IWOCL 2023: 21:1 - [i1]Ettore Tiotto, Victor Perez, Whitney Tsang, Lukas Sommer, Julian Oppermann, Victor Lomüller, Mehdi Goli, James Brodman:
Experiences Building an MLIR-based SYCL Compiler. CoRR abs/2312.13170 (2023) - 2022
- [c22]Lukas Sommer, Cristian Axenie
SPNC: An Open-Source MLIR-Based Compiler for Fast Sum-Product Network Inference on CPUs and GPUs. CGO 2022: 1-11 - [c21]Lukas Weber, Johannes Wirth, Lukas Sommer, Andreas Koch:
Exploiting High-Bandwidth Memory for FPGA-Acceleration of Inference on Sum-Product Networks. IPDPS Workshops 2022: 112-119 - 2021
- [b1]Lukas Sommer:
Programming Heterogeneous Systems with General and Domain-Specific Frameworks. Technical University of Darmstadt, Germany, 2021 - [j3]Carsten Heinz
The TaPaSCo Open-Source Toolflow. J. Signal Process. Syst. 93(5): 545-563 (2021) - [c20]Lukas Sommer, Michael Halkenhäuser
SPNC: Accelerating Sum-Product Network Inference on CPUs and GPUs. ASAP 2021: 53-56 - [c19]Marco Hartmann, Lukas Weber, Johannes Wirth, Lukas Sommer, Andreas Koch:
Optimizing a Hardware Network Stack to Realize an In-Network ML Inference Application. H2RC@SC 2021: 21-32 - [c18]Lukas Weber, Lukas Sommer, Leonardo Solis-Vasquez
A Framework for the Automatic Generation of FPGA-based Near-Data Processing Accelerators in Smart Storage Systems. IPDPS Workshops 2021: 136-143 - [c17]Lukas Sommer
SPNC: Fast Sum-Product Network Inference. PKDD/ECML Workshops (1) 2021: 397-408 - [c16]Hanna Kruppe
Efficient Operator Sharing Modulo Scheduling for Sum-Product Network Inference on FPGAs. SAMOS 2021: 242-258 - 2020
- [c15]Jens Huthmann, Artur Podobas, Lukas Sommer, Andreas Koch, Kentaro Sano:
Extending High-Level Synthesis with High-Performance Computing Performance Visualization. CLUSTER 2020: 371-380 - [c14]Lukas Sommer, Andreas Koch:
OpenMP Device Offloading for Embedded Heterogeneous Platforms - Work-in-Progress. EMSOFT 2020: 4-6 - [c13]Lukas Sommer
Comparison of Arithmetic Number Formats for Inference in Sum-Product Networks on FPGAs. FCCM 2020: 75-83 - [c12]Jens Huthmann, Lukas Sommer
OpenMP Device Offloading to FPGAs Using the Nymble Infrastructure. IWOMP 2020: 265-279 - [c11]Lukas Sommer
Using Parallel Programming Models for Automotive Workloads on Heterogeneous Systems - a Case Study. PDP 2020: 17-21 - [c10]Carsten Heinz, Jaco A. Hofmann, Lukas Sommer, Andreas Koch:
Improving Job Launch Rates in the TaPaSCo FPGA Middleware by Hardware/Software-Co-Design. ROSS@SC 2020: 22-30
2010 – 2019
- 2019
- [j2]Julian Oppermann, Lukas Sommer
SpExSim: assessing kernel suitability for C-based high-level hardware synthesis. J. Supercomput. 75(8): 4062-4077 (2019) - [j1]Julian Oppermann
Exact and Practical Modulo Scheduling for High-Level Synthesis. ACM Trans. Reconfigurable Technol. Syst. 12(2): 8:1-8:26 (2019) - [c9]Robin Kruppe, Julian Oppermann, Lukas Sommer, Andreas Koch:
Extending LLVM for Lightweight SPMD Vectorization: Using SIMD and Vector Instructions Easily from Any Language. CGO 2019: 278-279 - [c8]Lukas Sommer
DAPHNE - An automotive benchmark suite for parallel programming models on embedded heterogeneous platforms: work-in-progress. EMSOFT Companion 2019: 4 - [c7]Julian Oppermann, Lukas Sommer, Lukas Weber, Melanie Reuter-Oppermann
SkyCastle: A Resource-Aware Multi-Loop Scheduler for High-Level Synthesis. FPT 2019: 36-44 - [c6]Lukas Weber, Lukas Sommer
Resource-Efficient Logarithmic Number Scale Arithmetic for SPN Inference on FPGAs. FPT 2019: 251-254 - [c5]Micha Ober, Jaco A. Hofmann, Lukas Sommer
High-Throughput Multi-Threaded Sum-Product Network Inference in the Reconfigurable Cloud. H2RC@SC 2019: 26-33 - 2018
- [c4]Julian Oppermann, Melanie Reuter-Oppermann
Dependence Graph Preprocessing for Faster Exact Modulo Scheduling in High-Level Synthesis. FPL 2018: 280-286 - [c3]Lukas Sommer, Julian Oppermann, Alejandro Molina
Automatic Mapping of the Sum-Product Network Inference Problem to FPGA-Based Accelerators. ICCD 2018: 350-357 - 2017
- [c2]Lukas Sommer
OpenMP device offloading to FPGA accelerators. ASAP 2017: 201-205 - [c1]Lukas Sommer
Synthesis of interleaved multithreaded accelerators from OpenMP loops. ReConFig 2017: 1-7
Coauthor Index
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