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David Smékal
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- affiliation: Brno University of Technology, Brno, Czech Republic
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2020 – today
- 2024
- [c12]Peter Cíbik
, Patrik Dobias
Pushing AES-256-GCM to Limits: Design, Implementation and Real FPGA Tests. ACNS Workshops (1) 2024: 303-318 - 2021
- [c11]Sara Ricci
Implementing CRYSTALS-Dilithium Signature Scheme on FPGAs. ARES 2021: 1:1-1:11 - [c10]Lukas Malina, Peter Cíbik, Petr Jedlicka, David Smekal, Sara Ricci, Jakub Hrabovsky:
Hardware-based Cryptographic Accelerator for Post Quantum Era. ICUMT 2021: 149-155 - [i1]Sara Ricci, Lukas Malina, Petr Jedlicka, David Smekal, Jan Hajny, Peter Cíbik, Patrik Dobias:
Implementing CRYSTALS-Dilithium Signature Scheme on FPGAs. IACR Cryptol. ePrint Arch. 2021: 108 (2021) - 2020
- [c9]Lukas Malina
Hardware-Accelerated Cryptography for Software-Defined Networks with P4. SECITC 2020: 271-287
2010 – 2019
- 2019
- [c8]Jan Dvorak, David Kubánek, Jaroslav Koton
Adjustable Multiphase Sinusoidal Oscillator with Fractional-Order Elements. ICUMT 2019: 1-6 - [c7]David Smekal, Sara Ricci
Privacy-enhancing Cloud Computing Solution for Big Data. ICUMT 2019: 1-6 - [c6]Radek Fujdiak, Petr Blazek, Ludovic Apvrille, Zdenek Martinasek, Petr Mlynek
Modeling the Trade-off Between Security and Performance to Support the Product Life Cycle. MECO 2019: 1-6 - [c5]Lukas Malina
Towards Practical Deployment of Post-quantum Cryptography on Constrained Platforms and Hardware-Accelerated Platforms. SECITC 2019: 109-124 - 2018
- [c4]Zdenek Martinasek, Jan Hajny, David Smekal, Lukas Malina
200 Gbps Hardware Accelerated Encryption System for FPGA Network Cards. ASHES@CCS 2018: 11-17 - [c3]David Smekal
Hardware-Accelerated Twofish Core for FPGA. TSP 2018: 1-5 - 2017
- [c2]Zdenek Martinasek, Petr Blazek, Pavel Silhavy, David Smekal
Methodology for correlations discovery in security logs. ICUMT 2017: 294-298 - [c1]David Smekal
Packet generators on field programmable gate array platform. TSP 2017: 97-100
Coauthor Index
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