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Cosimo Aprile
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2020 – today
- 2022
- [j4]Arda Uran
, Kerim Türe
A 16-Channel Neural Recording System-on-Chip With CHT Feature Extraction Processor in 65-nm CMOS. IEEE J. Solid State Circuits 57(9): 2752-2763 (2022) - 2021
- [c12]Arda Uran, Kerim Türe
A 16-Channel Wireless Neural Recording System-on-Chip with CHT Feature Extraction Processor in 65nm CMOS. CICC 2021: 1-2 - 2020
- [j3]Gain Kim, Marcel A. Kossel, Alessandro Cevrero, Ilter Özkaya, Andreas Burg
A 161-mW 56-Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14-nm FinFET. IEEE J. Solid State Circuits 55(1): 38-48 (2020)
2010 – 2019
- 2019
- [c11]Jonathan Narinx, Robert Giterman, Andrea Bonetti, Nicolas Frigerio, Cosimo Aprile, Andreas Burg
A 24 kb Single-Well Mixed 3T Gain-Cell eDRAM with Body-Bias in 28 nm FD-SOI for Refresh-Free DSP Applications. A-SSCC 2019: 219-222 - [c10]Gain Kim, Lukas Kull, Danny Luu, Matthias Braendli
A 4.8pJ/b 56Gb/s ADC-Based PAM-4 Wireline Receiver Data-Path with Cyclic Prefix in 14nm FinFET. A-SSCC 2019: 239-240 - [c9]Gain Kim, Lukas Kull, Danny Luu, Matthias Braendli
A 161mW 56Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14nm FinFET. ISSCC 2019: 476-478 - 2018
- [j2]Cosimo Aprile, Alessandro Cevrero, Pier Andrea Francese
An Eight-Lane 7-Gb/s/pin Source Synchronous Single-Ended RX With Equalization and Far-End Crosstalk Cancellation for Backplane Channels. IEEE J. Solid State Circuits 53(3): 861-872 (2018) - [j1]Cosimo Aprile
Adaptive Learning-Based Compressive Sampling for Low-power Wireless Implants. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(11): 3929-3941 (2018) - [c8]Cosimo Aprile, Johannes Wüthrich, Luca Baldassarre, Yusuf Leblebici, Volkan Cevher
An area and power efficient on-the-fly LBCS transformation for implantable neuronal signal acquisition systems. CF 2018: 228-231 - [c7]Rabeeh Karimi Mahabadi, Cosimo Aprile, Volkan Cevher
Real-Time DCT Learning-based Reconstruction of Neural Signals. EUSIPCO 2018: 1925-1929 - [c6]Gain Kim, Lukas Kull, Danny Luu, Matthias Braendli
Parallel Implementation Technique of Digital Equalizer for Ultra-High-Speed Wireline Receiver. ISCAS 2018: 1-5 - 2017
- [c5]Cosimo Aprile, Johannes Wüthrich, Luca Baldassarre, Yusuf Leblebici, Volkan Cevher
DCT Learning-Based Hardware Design for Neural Signal Acquisition Systems. Conf. Computing Frontiers 2017: 391-394 - 2016
- [c4]Cosimo Aprile, Luca Baldassarre, Vipul Gupta, Juhwan Yoo, Mahsa Shoaran
Learning-Based Near-Optimal Area-Power Trade-offs in Hardware Design for Neural Signal Acquisition. ACM Great Lakes Symposium on VLSI 2016: 433-438 - 2015
- [c3]Luca Baldassarre, Cosimo Aprile, Mahsa Shoaran
Structured sampling and recovery of iEEG signals. CAMSAP 2015: 269-272 - [c2]Baran Gozcu
A primal-dual framework for mixtures of regularizers. EUSIPCO 2015: 240-244 - [c1]Alessandro Cevrero, Cosimo Aprile, Pier Andrea Francese
A 5.9mW/Gb/s 7Gb/s/pin 8-lane single-ended RX with crosstalk cancellation scheme using a XCTLE and 56-tap XDFE in 32nm SOI CMOS. VLSIC 2015: 228-
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