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Abhoy Kole
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2020 – today
- 2024
- [c19]Abhoy Kole, Arighna Deb, Kamalika Datta, Rolf Drechsler:
Dynamic Realization of Multiple Control Toffoli Gate. DATE 2024: 1-6 - [c18]Lennart Weingarten, Kamalika Datta, Abhoy Kole, Rolf Drechsler:
Complete and Efficient Verification for a RISC-V Processor Using Formal Verification. DATE 2024: 1-6 - [c17]Khushboo Qayyum
, Abhoy Kole
Exploring the Potential of Decision Diagrams for Efficient In-Memory Design Verification. ACM Great Lakes Symposium on VLSI 2024: 502-506 - [c16]Abhoy Kole, Kamalika Datta, Rolf Drechsler:
Design Automation Challenges and Benefits of Dynamic Quantum Circuit in Present NISQ Era and Beyond: (Invited Paper). ISVLSI 2024: 601-606 - [c15]Liam Hurwitz, Kamalika Datta, Abhoy Kole, Rolf Drechsler:
Is Simulation the only Alternative for Effective Verification of Dynamic Quantum Circuits? RC 2024: 201-217 - [c14]Fatemeh Shirinzadeh, Arighna Deb, Saeideh Shirinzadeh, Abhoy Kole, Kamalika Datta, Rolf Drechsler:
In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures. VLSID 2024: 384-389 - [i1]Abhoy Kole, Mohammed E. Djeridane, Lennart Weingarten, Kamalika Datta, Rolf Drechsler:
qSAT: Design of an Efficient Quantum Satisfiability Solver for Hardware Equivalence Checking. CoRR abs/2409.03917 (2024) - 2023
- [j4]Kamalika Datta, Arighna Deb, Abhoy Kole, Rolf Drechsler
Impact of sneak paths on in-memory logic design in memristive crossbars. it Inf. Technol. 65(1-2): 29-39 (2023) - [c13]Abhoy Kole, Arighna Deb, Kamalika Datta, Rolf Drechsler:
Extending the Design Space of Dynamic Quantum Circuits for Toffoli based Network. DATE 2023: 1-6 - [c12]Kamalika Datta, Arighna Deb, Fatemeh Shirinzadeh, Abhoy Kole, Saeideh Shirinzadeh, Rolf Drechsler:
Verification of In-Memory Logic Design using ReRAM Crossbars. NEWCAS 2023: 1-5 - [c11]Kamalika Datta, Abhoy Kole
Improved Cost-Metric for Nearest Neighbor Mapping of Quantum Circuits to 2-Dimensional Hexagonal Architecture. RC 2023: 218-231 - [c10]Abhoy Kole
Exploiting the Benefits of Clean Ancilla Based Toffoli Gate Decomposition Across Architectures. RC 2023: 232-244 - 2022
- [c9]Abhoy Kole, Kamalika Datta, Indranil Sengupta, Rolf Drechsler
SAT-based Exact Synthesis of Ternary Reversible Circuits using a Functionally Complete Gate Library. DSD 2022: 769-776 - [c8]Kamalika Datta, Abhoy Kole, Indranil Sengupta, Rolf Drechsler
Mapping Quantum Circuits to 2-Dimensional Quantum Architectures. GI-Jahrestagung 2022: 1109-1120 - [c7]Kamalika Datta, Abhoy Kole, Indranil Sengupta, Rolf Drechsler
Nearest Neighbor Mapping of Quantum Circuits to Two-Dimensional Hexagonal Qubit Architecture. ISMVL 2022: 35-42 - 2020
- [j3]Abhoy Kole
Improved Mapping of Quantum Circuits to IBM QX Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2375-2383 (2020)
2010 – 2019
- 2018
- [j2]Abhoy Kole
A New Heuristic for N-Dimensional Nearest Neighbor Realization of a Quantum Circuit. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(1): 182-192 (2018) - 2017
- [c6]Abhoy Kole, P. Mercy Nesa Rani
Exact Synthesis of Ternary Reversible Functions Using Ternary Toffoli Gates. ISMVL 2017: 179-184 - [c5]Abhoy Kole, Robert Wille, Kamalika Datta, Indranil Sengupta:
Test Pattern Generation Effort Evaluation of Reversible Circuits. RC 2017: 162-175 - [c4]P. Mercy Nesa Rani
Improved Decomposition of Multiple-Control Ternary Toffoli Gates Using Muthukrishnan-Stroud Quantum Gates. RC 2017: 202-213 - [c3]Leniency Marbaniang, Abhoy Kole, Kamalika Datta, Indranil Sengupta:
Design of Efficient Quantum Circuits Using Nearest Neighbor Constraint in 2D Architecture. RC 2017: 248-253 - [c2]Abhoy Kole, Kamalika Datta:
Improved NCV Gate Realization of Arbitrary Size Toffoli Gates. VLSID 2017: 289-294 - 2016
- [j1]Abhoy Kole, Kamalika Datta, Indranil Sengupta:
A Heuristic for Linear Nearest Neighbor Realization of Quantum Circuits by SWAP Gate Insertion Using N-Gate Lookahead. IEEE J. Emerg. Sel. Topics Circuits Syst. 6(1): 62-72 (2016) - 2015
- [c1]Abhoy Kole, Kamalika Datta, Indranil Sengupta, Robert Wille
Towards a Cost Metric for Nearest Neighbor Constraints in Reversible Circuits. RC 2015: 273-278
Coauthor Index
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