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Rakesh Kumar Palani
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2020 – today
- 2024
- [j6]Ayan Alam Khan
, Rakesh Kumar Palani
Analysis and Design of Low Noise Voltage Regulator With Integrated Single BJT Bandgap Reference Upto 10 mA Loads. IEEE Trans. Circuits Syst. II Express Briefs 71(6): 2966-2970 (2024) - [c12]Rakesh Kumar Palani:
Analysis and design of Chopperless 7 ppm/°C Bandgap Voltage Reference. ISCAS 2024: 1-4 - [c11]Rakesh Kumar Palani, Srishti Agrawal, Ayan Alam Khan, Aadarsh V, Rajasekhar Nagulapalli:
A Wide Range Constant Transconductance Circuit Based on Negative Feedback for Analog Circuits. ISCAS 2024: 1-4 - 2023
- [c10]Sweta Agarwal, Shouri Chatterjee, Rakesh Kumar Palani:
On thermally-induced mechanical stress in high resistivity polysilicon resistors. ISCAS 2023: 1-5 - [c9]Rakesh Kumar Palani, Rajasekhar Nagulapalli, Srikar Bhagavatula:
Dynamic Averager Based Sub-1V Bandgap Voltage Reference. MWSCAS 2023: 890-894 - 2022
- [j5]Rakesh Kumar Palani
A Sub-1-V 8.5-ppm/°C Sampled Bandgap Voltage Reference. IEEE Trans. Circuits Syst. II Express Briefs 69(10): 4153-4157 (2022) - [j4]Shibendra Narayan Sinha, Shouri Chatterjee
A 2-GHz Two-Tone Direct Digital Frequency Synthesizer. IEEE Trans. Circuits Syst. II Express Briefs 69(12): 5109-5113 (2022) - 2021
- [j3]Rajasekhar Nagulapalli, Rakesh Kumar Palani
A 24.4 ppm/°C Voltage Mode Bandgap Reference With a 1.05V Supply. IEEE Trans. Circuits Syst. II Express Briefs 68(4): 1088-1092 (2021) - [c8]Rajasekhar Nagulapalli, Rakesh Kumar Palani, Sweta Agarwal, Shouri Chatterjee, K. Hayatleh, S. Barker:
A 15uW, 12 ppm/°C Curvature Compensated Bandgap in 0.85V Supply. ISCAS 2021: 1-4 - [c7]Rajasekhar Nagulapalli, Rakesh Kumar Palani:
A Novel 22.7 ppm/0C Voltage mode Sub-Bandgap Reference with robust startup nature. MWSCAS 2021: 844-847
2010 – 2019
- 2015
- [j2]Ramesh Harjani, Danijela Cabric
Wideband blind signal classification on a battery budget. IEEE Commun. Mag. 53(10): 173-181 (2015) - [j1]Rakesh Kumar Palani, Ramesh Harjani:
A 220-MS/s 9-Bit 2X Time-Interleaved SAR ADC With a 133-fF Input Capacitance and a FOM of 37 fJ/conv in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 62-II(11): 1053-1057 (2015) - [c6]Ramesh Harjani, Rakesh Kumar Palani:
Design of PVT tolerant inverter based circuits for low supply voltages. CICC 2015: 1-8 - [c5]Rakesh Kumar Palani, Ramesh Harjani:
A 4.6mW, 22dBm IIP3 all MOSCAP based 34-314MHz tunable continuous time filter in 65nm. CICC 2015: 1-4 - [c4]Hundo Shin, Rakesh Kumar Palani, Anindya Saha, Fang-Li Yuan, Dejan Markovic, Ramesh Harjani:
An eight channel analog-FFT based 450MS/s hybrid filter bank ADC with improved SNDR for multi-band signals in 40nm CMOS. CICC 2015: 1-4 - [c3]Rakesh Kumar Palani, Aravindhan Rangarajan, Ramesh Harjani:
Chopper stabilized sub 1V reference voltage in 65nm CMOS. MWSCAS 2015: 1-4 - [c2]Fang-Li Yuan, Rakesh Kumar Palani, Sina Basir-Kazeruni, Hundo Shin, Anindya Saha, Ramesh Harjani, Dejan Markovic:
A throughput-agnostic 11.9-13.6GOPS/mW multi-signal classification SoC for cognitive radios in 40nm CMOS. VLSIC 2015: 150- - 2014
- [c1]Rakesh Kumar Palani, Ramesh Harjani:
High linearity PVT tolerant 100MS/s rail-to-rail ADC driver with built-in sampler in 65nm CMOS. CICC 2014: 1-4
Coauthor Index
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