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Hyosup Won
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2020 – today
- 2024
- [j7]Woohyun Kwon, Hyosup Won, Taeho Kim, Sejun Jeon, Soon-Won Kwon, Ha-Il Song, Hanho Choi, Bongjin Kim, Huxian Jin, Jun-Gi Jo, Woosang Han, Tai-Young Kim, Gain Kim, Jake Eu, Jinho Park, Hyeon-Min Bae:
A 26-Gb/s Framed-Pulsewidth Modulation Transceiver for Extended Reach Optical Links. IEEE J. Solid State Circuits 59(8): 2506-2517 (2024) - 2023
- [c7]Hanho Choi, Ha-Il Song, Hyosup Won, Jun Young Yoo, Woohyun Kwon, Huxian Jin, Konan Kwon, Cheong Min Lee, Gain Kim, Jake Eu, Sean Park, Hyeon-Min Bae:
An 86.71875GHz RF transceiver for 57.8125Gb/s waveguide links with a CDR-assisted carrier synchronization loop in 28nm. ESSCIRC 2023: 181-184 - 2022
- [c6]Ha-Il Song, Hanho Choi, Jun Young Yoo, Hyosup Won, Cheong Min Lee, Huxian Jin, Tai Young Kim, Woohyun Kwon, Kyoohyun Lim, Konan Kwon, Chang-Ahn Kim, Taeho Kim, Jun-Gi Jo, Jake Eu, Sean Park, Hyeon-Min Bae:
A 50Gb/s PAM-4 Bi-Directional Plastic Waveguide Link with Carrier Synchronization Using PI-Based Costas Loop. ISSCC 2022: 1-3 - [c5]Woohyun Kwon, Hyosup Won, Taeho Kim, Ha-Il Song, Hanho Choi, Sejun Jeon, Soon-Won Kwon, Huxian Jin, Jun-Gi Jo, Tai Young Kim, Jake Eu, Jinho Park, Hyeon-Min Bae:
A 25.78125Gbps Bi-directional Transceiver with Framed-Pulsewidth Modulation (FPWM) for Extended Reach Optical Links in 28nm CMOS. VLSI Technology and Circuits 2022: 156-157
2010 – 2019
- 2018
- [c4]Kyeongha Kwon, Jong-Hyeok Yoon, Hanho Choi, Younho Jeon, Jaehyeok Yang, Bongjin Kim, Soon-Won Kwon, Minsik Kim, Sejun Jeon, Hyosup Won, Hyeon-Min Bae:
A 28Gb/s transceiver with chirp-managed EDC for DML systems. ISSCC 2018: 264-266 - 2017
- [j6]Taehun Yoon, Joon-Yeong Lee, Jinhee Lee, Kwangseok Han, Jeong-Sup Lee, Sangeun Lee, Taeho Kim, Jinho Han, Hyosup Won, Jinho Park, Hyeon-Min Bae:
A 103.125-Gb/s Reverse Gearbox IC in 40-nm CMOS for Supporting Legacy 10- and 40-GbE Links. IEEE J. Solid State Circuits 52(3): 688-703 (2017) - [j5]Hyosup Won, Joon-Yeong Lee, Taehun Yoon, Kwangseok Han, Sangeun Lee, Jinho Park, Hyeon-Min Bae:
A 28-Gb/s Receiver With Self-contained Adaptive Equalization and Sampling Point Control Using Stochastic Sigma-Tracking Eye-Opening Monitor. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(3): 664-674 (2017) - 2016
- [j4]Joon-Yeong Lee, Jaehyeok Yang, Jong-Hyeok Yoon, Soon-Won Kwon, Hyosup Won, Jinho Han, Hyeon-Min Bae:
A 4×10-Gb/s Referenceless-and-Masterless Phase Rotator-Based Parallel Transceiver in 90-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 24(6): 2310-2320 (2016) - 2015
- [j3]Hyosup Won, Taehun Yoon, Jinho Han, Joon-Yeong Lee, Jong-Hyeok Yoon, Taeho Kim, Jeong-Sup Lee, Sangeun Lee, Kwangseok Han, Jinhee Lee, Jinho Park, Hyeon-Min Bae:
A 0.87 W Transceiver IC for 100 Gigabit Ethernet in 40 nm CMOS. IEEE J. Solid State Circuits 50(2): 399-413 (2015) - [j2]Soon-Won Kwon, Joon-Yeong Lee, Jinhee Lee, Kwangseok Han, Taeho Kim, Sangeun Lee, Jeong-Sup Lee, Taehun Yoon, Hyosup Won, Jinho Park, Hyeon-Min Bae:
An Automatic Loop Gain Control Algorithm for Bang-Bang CDRs. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(12): 2817-2828 (2015) - [c3]Hyosup Won, Kwangseok Han, Sangeun Lee, Jinho Park, Hyeon-Min Bae:
An on-chip stochastic sigma-tracking eye-opening monitor for BER-optimal adaptive equalization. CICC 2015: 1-4 - [c2]Taehun Yoon, Joon-Yeong Lee, Kwangseok Han, Jeong-Sup Lee, Sangeun Lee, Taeho Kim, Hyosup Won, Jinho Park, Hyeon-Min Bae:
A 100-GbE reverse gearbox IC in 40nm CMOS for supporting legacy 10- and 40-GbE standards. VLSIC 2015: 212- - 2014
- [j1]Jinho Han, Hyosup Won, Hyeon-Min Bae:
0.6-2.7-Gb/s Referenceless Parallel CDR With a Stochastic Dispersion-Tolerant Frequency Acquisition Technique. IEEE Trans. Very Large Scale Integr. Syst. 22(6): 1219-1225 (2014) - [c1]Kyeongha Kwon, Jong-Hyeok Yoon, Soon-Won Kwon, Jaehyeok Yang, Joon-Yeong Lee, Hyosup Won, Hyeon-Min Bae:
8.1 A 6Gb/s transceiver with a nonlinear electronic dispersion compensator for directly modulated distributed-feedback lasers. ISSCC 2014: 138-139
Coauthor Index
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last updated on 2024-08-23 18:35 CEST by the dblp team
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