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Nasim Farahini
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2010 – 2019
- 2017
- [c11]Syed Mohammad Asad Hassan Jafri, Nasim Farahini, Ahmed Hemani:
SiLago-CoG: Coarse-Grained Grid-Based Design for Near Tape-Out Power Estimation Accuracy at High Level. ISVLSI 2017: 25-31 - 2015
- [j2]Syed M. A. H. Jafri, Ozan Ozbag, Nasim Farahini, Kolin Paul, Ahmed Hemani, Juha Plosila
, Hannu Tenhunen:
Architecture and Implementation of Dynamic Parallelism, Voltage and Frequency Scaling (PVFS) on CGRAs. ACM J. Emerg. Technol. Comput. Syst. 11(4): 40:1-40:29 (2015) - [c10]Nasim Farahini, Ahmed Hemani:
Atomic stream computation unit based on micro-thread level parallelism. ASAP 2015: 25-29 - [c9]Nasim Farahini, Ahmed Hemani, Hasan Sohofi, Shuo Li:
Physical design aware system level synthesis of hardware. SAMOS 2015: 141-148 - 2014
- [j1]Nasim Farahini, Ahmed Hemani, Hasan Sohofi, Syed M. A. H. Jafri, Muhammad Adeel Tajammul, Kolin Paul:
Parallel distributed scalable runtime address generation scheme for a coarse grain reconfigurable computation and storage fabric. Microprocess. Microsystems 38(8): 788-802 (2014) - [c8]Anders Lansner, Ahmed Hemani, Nasim Farahini:
Spiking brain models: Computation, memory and communication constraints for custom hardware implementation. ASP-DAC 2014: 556-562 - [c7]Nasim Farahini, Ahmed Hemani, Anders Lansner, Fabien Clermidy, Christer Svensson:
A scalable custom simulation machine for the Bayesian Confidence Propagation Neural Network model of the brain. ASP-DAC 2014: 578-585 - [c6]Siavoosh Payandeh Azad
Customization methodology of a Coarse Grained Reconfigurable architecture. NORCHIP 2014: 1-4 - 2013
- [c5]Shuo Li, Nasim Farahini, Ahmed Hemani, Kathrin Rosvall, Ingo Sander
System level synthesis of hardware for DSP applications using pre-characterized function implementations. CODES+ISSS 2013: 16:1-16:10 - [c4]Nasim Farahini, Ahmed Hemani, Kolin Paul:
Distributed Runtime Computation of Constraints for Multiple Inner Loops. DSD 2013: 389-395 - [c3]Shuo Li, Nasim Farahini, Ahmed Hemani:
Global Control and Storage Synthesis for a System Level Synthesis Approach. FCCM 2013: 239 - [c2]Nasim Farahini, Shuo Li, Muhammad Adeel Tajammul, Muhammad Ali Shami
39.9 GOPs/watt multi-mode CGRA accelerator for a multi-standard basestation. ISCAS 2013: 1448-1451 - [c1]Syed M. A. H. Jafri, Ozan Bag, Ahmed Hemani, Nasim Farahini, Kolin Paul, Juha Plosila
Energy-aware coarse-grained reconfigurable architectures using dynamically reconfigurable isolation cells. ISQED 2013: 104-111
Coauthor Index
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