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Kevin Townsend
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2010 – 2019
- 2016
- [j3]Chad Nelson, Kevin R. Townsend, Osama G. Attia, Phillip H. Jones, Joseph Zambreno
:
RAMPS: A Reconfigurable Architecture for Minimal Perfect Sequencing. IEEE Trans. Parallel Distributed Syst. 27(10): 3029-3043 (2016) - [j2]Osama G. Attia
A Reconfigurable Architecture for the Detection of Strongly Connected Components. ACM Trans. Reconfigurable Technol. Syst. 9(2): 16:1-16:19 (2016) - 2015
- [j1]Kevin R. Townsend, Osama G. Attia, Phillip H. Jones, Joseph Zambreno
A Scalable Unsegmented Multiport Memory for FPGA-Based Systems. Int. J. Reconfigurable Comput. 2015: 826283:1-826283:12 (2015) - [c8]Kevin R. Townsend, Joseph Zambreno:
A multi-phase approach to floating-point compression. EIT 2015: 251-256 - [c7]Kevin R. Townsend, Song Sun, Tyler Johnson, Osama G. Attia, Phillip H. Jones, Joseph Zambreno:
k-NN text classification using an FPGA-based sparse matrix vector multiplication accelerator. EIT 2015: 257-263 - [c6]Osama G. Attia, Alex Grieve, Kevin R. Townsend, Phillip H. Jones, Joseph Zambreno:
Accelerating all-pairs shortest path using a message-passing reconfigurable architecture. ReConFig 2015: 1-6 - 2014
- [c5]Osama G. Attia, Tyler Johnson, Kevin Townsend, Phillip H. Jones, Joseph Zambreno:
CyGraph: A Reconfigurable Architecture for Parallel Breadth-First Search. IPDPS Workshops 2014: 228-235 - [c4]Kevin Townsend, Phillip H. Jones, Joseph Zambreno:
A high performance systolic architecture for k-NN classification. MEMOCODE 2014: 201-204 - 2013
- [c3]Kevin Townsend, Joseph Zambreno:
Reduce, Reuse, Recycle (R3): A design methodology for Sparse Matrix Vector Multiplication on reconfigurable platforms. ASAP 2013: 185-191 - [c2]Tao Zeng, Kevin Townsend, Jingbo Duan, Degang Chen:
A 15-bit binary-weighted current-steering DAC with ordered element matching. CICC 2013: 1-4 - 2012
- [c1]Chad Nelson, Kevin Townsend, Bhavani Satyanarayana Rao, Phillip H. Jones, Joseph Zambreno:
Shepard: A fast exact match short read aligner. MEMOCODE 2012: 91-94
Coauthor Index
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