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Yuetsu Kodama
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2020 – today
- 2023
- [j14]Yuetsu Kodama, Masaaki Kondo, Mitsuhisa Sato:
Evaluation of Performance and Power Consumption on Supercomputer Fugaku Using SPEC HPC Benchmarks. IEICE Trans. Electron. 106(6): 303-311 (2023) - [j13]Jens Domke, Emil Vatai, Balazs Gerofi, Yuetsu Kodama, Mohamed Wahib, Artur Podobas, Sparsh Mittal, Miquel Pericàs, Lingqi Zhang, Peng Chen, Aleksandr Drozd, Satoshi Matsuoka:
At the Locus of Performance: Quantifying the Effects of Copious 3D-Stacked Cache on HPC Workloads. ACM Trans. Archit. Code Optim. 20(4): 57:1-57:26 (2023) - 2022
- [j12]Mitsuhisa Sato, Yuetsu Kodama, Miwako Tsuji, Tesuya Odajima:
Co-Design and System for the Supercomputer "Fugaku". IEEE Micro 42(2): 26-34 (2022) - [i3]Jens Domke, Emil Vatai, Balazs Gerofi, Yuetsu Kodama, Mohamed Wahib, Artur Podobas, Sparsh Mittal, Miquel Pericàs, Lingqi Zhang, Peng Chen, Aleksandr Drozd, Satoshi Matsuoka:
At the Locus of Performance: A Case Study in Enhancing CPUs with Copious 3D-Stacked Cache. CoRR abs/2204.02235 (2022) - 2021
- [j11]Tetsuya Odajima, Yuetsu Kodama, Mitsuhisa Sato:
Performance and power consumption analysis of Arm Scalable Vector Extension. J. Supercomput. 77(6): 5757-5778 (2021) - [c58]Yuetsu Kodama, Masaaki Kondo, Mitsuhisa Sato:
Evaluation of SPEC CPU and SPEC OMP on the A64FX. CLUSTER 2021: 553-561 - [c57]Eishi Arima, Yuetsu Kodama, Tetsuya Odajima, Miwako Tsuji, Mitsuhisa Sato:
Power/Performance/Area Evaluations for Next-Generation HPC Processors using the A64FX Chip. COOL CHIPS 2021: 1-6 - [c56]Masahiro Nakao, Koji Ueno, Katsuki Fujisawa, Yuetsu Kodama, Mitsuhisa Sato:
Performance of the Supercomputer Fugaku for Breadth-First Search in Graph500 Benchmark. ISC 2021: 372-390 - 2020
- [c55]Masahiro Nakao, Koji Ueno, Katsuki Fujisawa, Yuetsu Kodama, Mitsuhisa Sato:
Performance Evaluation of Supercomputer Fugaku using Breadth-First Search Benchmark in Graph500. CLUSTER 2020: 408-409 - [c54]Yuetsu Kodama, Tetsuya Odajima, Eishi Arima, Mitsuhisa Sato:
Evaluation of Power Management Control on the Supercomputer Fugaku. CLUSTER 2020: 484-493 - [c53]Tetsuya Odajima, Yuetsu Kodama, Miwako Tsuji, Motohiko Matsuda, Yutaka Maruyama, Mitsuhisa Sato:
Preliminary Performance Evaluation of the Fujitsu A64FX Using HPC Applications. CLUSTER 2020: 523-530 - [c52]Yuetsu Kodama, Tetsuya Odajima, Akira Asato, Mitsuhisa Sato:
Accuracy Improvement of Memory System Simulation for Modern Shared Memory Processor. HPC Asia 2020: 142-149 - [c51]Mitsuhisa Sato, Yutaka Ishikawa, Hirofumi Tomita, Yuetsu Kodama, Tetsuya Odajima, Miwako Tsuji, Hisashi Yashiro, Masaki Aoki, Naoyuki Shida, Ikuo Miyoshi, Kouichi Hirai, Atsushi Furuya, Akira Asato, Kuniki Morita, Toshiyuki Shimizu:
Co-design for A64FX manycore processor and "Fugaku". SC 2020: 47 - [i2]Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian, Rico Amslinger, Matteo Andreozzi, Adrià Armejach, Nils Asmussen, Srikant Bharadwaj, Gabe Black, Gedare Bloom, Bobby R. Bruce, Daniel Rodrigues Carvalho, Jerónimo Castrillón, Lizhong Chen, Nicolas Derumigny, Stephan Diestelhorst, Wendy Elsasser, Marjan Fariborz, Amin Farmahini Farahani, Pouya Fotouhi, Ryan Gambord, Jayneel Gandhi, Dibakar Gope, Thomas Grass, Bagus Hanindhito, Andreas Hansson, Swapnil Haria, Austin Harris, Timothy Hayes, Adrian Herrera, Matthew Horsnell, Syed Ali Raza Jafri, Radhika Jagtap, Hanhwi Jang, Reiley Jeyapaul, Timothy M. Jones, Matthias Jung, Subash Kannoth, Hamidreza Khaleghzadeh, Yuetsu Kodama, Tushar Krishna, Tommaso Marinelli, Christian Menard, Andrea Mondelli, Tiago Mück, Omar Naji, Krishnendra Nathella, Hoa Nguyen, Nikos Nikoleris, Lena E. Olson, Marc S. Orr, Binh Pham, Pablo Prieto, Trivikram Reddy, Alec Roelke, Mahyar Samani, Andreas Sandberg, Javier Setoain, Boris Shingarov, Matthew D. Sinclair, Tuan Ta, Rahul Thakur, Giacomo Travaglini, Michael Upton, Nilay Vaish, Ilias Vougioukas, Zhengrong Wang, Norbert Wehn, Christian Weis, David A. Wood, Hongil Yoon, Éder F. Zulian:
The gem5 Simulator: Version 20.0+. CoRR abs/2007.03152 (2020)
2010 – 2019
- 2019
- [i1]Yuetsu Kodama, Tetsuya Odajima, Akira Asato, Mitsuhisa Sato:
Evaluation of the RIKEN Post-K Processor Simulator. CoRR abs/1904.06451 (2019) - 2018
- [c50]Tetsuya Odajima, Yuetsu Kodama, Mitsuhisa Sato:
Power performance analysis of ARM scalable vector extension. COOL CHIPS 2018: 1-3 - 2017
- [c49]Yuetsu Kodama, Tetsuya Odajima, Motohiko Matsuda, Miwako Tsuji, Jinpil Lee, Mitsuhisa Sato:
Preliminary Performance Evaluation of Application Kernels Using ARM SVE with Multiple Vector Lengths. CLUSTER 2017: 677-684 - 2015
- [c48]Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Hideharu Amano, Hitoshi Murai, Masayuki Umemura, Mitsuhisa Sato:
Towards Unification of Accelerated Computing and Interconnection For Extreme-Scale Computing. ARC 2015: 463-474 - [c47]Toshihiro Hanawa, Hisafumi Fujii, Norihisa Fujita, Tetsuya Odajima, Kazuya Matsumoto, Yuetsu Kodama, Taisuke Boku:
Improving Strong-Scaling on GPU Cluster Based on Tightly Coupled Accelerators Architecture. CLUSTER 2015: 88-91 - [c46]Kazuya Matsumoto, Toshihiro Hanawa, Yuetsu Kodama, Hisafumi Fujii, Taisuke Boku:
Implementation of CG Method on GPU Cluster with Proprietary Interconnect TCA for GPU Direct Communication. IPDPS Workshops 2015: 647-655 - 2014
- [j10]Yuetsu Kodama, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato:
PEACH2: An FPGA-based PCIe network device for Tightly Coupled Accelerators. SIGARCH Comput. Archit. News 42(4): 3-8 (2014) - [c45]Norihisa Fujita, Hisafumi Fujii, Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Yoshinobu Kuramashi, Mike Clark:
QCD Library for GPU Cluster with Proprietary Interconnect for GPU Direct Communication. Euro-Par Workshops (1) 2014: 251-262 - [c44]Takuya Kuhara, Takahiro Kaneda, Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Hideharu Amano:
A Preliminarily Evaluation of PEACH3: A Switching Hub for Tightly Coupled Accelerators. CANDAR 2014: 377-381 - [c43]Masahiro Nakao, Hitoshi Murai, Takenori Shimosaka, Akihiro Tabuchi, Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Mitsuhisa Sato:
XcalableACC: extension of XcalableMP PGAS language using OpenACC for accelerator clusters. WACCPD@SC 2014: 27-36 - 2013
- [j9]Yuetsu Kodama, Satoshi Itoh, Toshiyuki Shimizu, Satoshi Sekiguchi, Hiroshi Nakamura, Naohiko Mori:
Imbalance of CPU temperatures in a blade system and its impact for power consumption of fans. Clust. Comput. 16(1): 27-37 (2013) - [c42]Kenta Fujinami, Yoshiki Yamaguchi, Akira Sugiura, Yuetsu Kodama:
The study of three-dimensional multiphase-flow simulator. FPL 2013: 1-4 - [c41]Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Mitsuhisa Sato:
Interconnection Network for Tightly Coupled Accelerators Architecture. Hot Interconnects 2013: 79-82 - [c40]Suguru Ochiai, Yoshiki Yamaguchi, Yuetsu Kodama:
The Flexible Sound Synthesizer on an FPGA. CANDAR 2013: 104-111 - [c39]Tetsuya Odajima, Taisuke Boku, Mitsuhisa Sato, Toshihiro Hanawa, Yuetsu Kodama, Raymond Namyst, Samuel Thibault, Olivier Aumage:
Adaptive Task Size Control on High Level Programming for GPU/CPU Work Sharing. ICA3PP (2) 2013: 59-68 - [c38]Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Mitsuhisa Sato:
Tightly Coupled Accelerators Architecture for Minimizing Communication Latency among Accelerators. IPDPS Workshops 2013: 1030-1039 - 2011
- [j8]Ryousei Takano, Tomohiro Kudoh, Yuetsu Kodama, Fumihiro Okazaki:
High-Resolution Timer-Based Packet Pacing Mechanism on the Linux Operating System. IEICE Trans. Commun. 94-B(8): 2199-2207 (2011) - 2010
- [c37]Yuetsu Kodama, Satoshi Itoh, Toshiyuki Shimizu, Satoshi Sekiguchi, Hiroshi Nakamura, Naohiko Mori:
Power Reduction Scheme of Fans in a Blade System by Considering the Imbalance of CPU Temperatures. GreenCom/CPSCom 2010: 81-87 - [c36]Satoshi Itoh, Yuetsu Kodama, Hiroshi Shimizu, Satoshi Sekiguchi, Hiroshi Nakamura, Naohiko Mori:
Power consumption and efficiency of cooling in a Data Center. GRID 2010: 305-312
2000 – 2009
- 2009
- [c35]Patrick Loiseau, Paulo Gonçalves, Romaric Guillier, Matthieu Imbert, Yuetsu Kodama, Pascale Vicat-Blanc Primet:
Metroflux: A high performance system for analysing flow at very fine-grain. TRIDENTCOM 2009: 1-9 - 2008
- [j7]Motohiko Matsuda, Tomohiro Kudoh, Yuetsu Kodama, Ryousei Takano, Yutaka Ishikawa:
The design and implementation of MPI collective operations for clusters in long-and-fast networks. Clust. Comput. 11(1): 45-55 (2008) - [c34]Ryousei Takano, Motohiko Matsuda, Tomohiro Kudoh, Yuetsu Kodama, Fumihiro Okazaki, Yutaka Ishikawa, Yasufumi Yoshizawa:
High Performance Relay Mechanism for MPI Communication Libraries Run on Multiple Private IP Address Clusters. CCGRID 2008: 401-408 - 2007
- [j6]Yuetsu Kodama, Tomohiro Kudoh, Toshiyuki Shimizu:
Dependable communication using multiple network paths on fast long-distance networks. Syst. Comput. Jpn. 38(12): 46-54 (2007) - [c33]Ryousei Takano, Motohiko Matsuda, Tomohiro Kudoh, Yuetsu Kodama, Fumihiro Okazaki, Yutaka Ishikawa:
Effects of packet pacing for MPI programs in a Grid environment. CLUSTER 2007: 382-391 - 2006
- [c32]Motohiko Matsuda, Tomohiro Kudoh, Yuetsu Kodama, Ryousei Takano, Yutaka Ishikawa:
Efficient MPI Collective Operations for Clusters in Long-and-Fast Networks. CLUSTER 2006 - 2005
- [c31]Motohiko Matsuda, Tomohiro Kudoh, Yuetsu Kodama, Ryousei Takano, Yutaka Ishikawa:
TCP Adaptation for MPI on Long-and-Fat Networks. CLUSTER 2005: 1-10 - 2004
- [c30]Yuetsu Kodama, Tomohiro Kudoh, Ryousei Takano, Hitoshi Sato, Osamu Tatebe, Satoshi Sekiguchi:
GNET-1: gigabit Ethernet network testbed. CLUSTER 2004: 185-192 - [c29]Osamu Tatebe, Hirotaka Ogawa, Yuetsu Kodama, Tomohiro Kudoh, Satoshi Sekiguchi, Satoshi Matsuoka, Kento Aida, Taisuke Boku, Mitsuhisa Sato, Youhei Morita, Yoshinori Kitatsuji, Jim Williams, John Hicks:
The Second Trans-Pacific Grid Datafarm Testbed and Experiments for SC2003. SAINT Workshops 2004: 602-607 - 2003
- [c28]Koji Segawa, Osamu Tatebe, Yuetsu Kodama, Tomohiro Kudoh, Toshiyuki Shimizu:
Design and implementation of PVFS-PM: a cluster file system on SCore. CCGRID 2003: 705-711 - 2001
- [c27]Andrew Sohn, Yuetsu Kodama, Jui-Yuan Ku, Mitsuhisa Sato, Yoshinori Yamaguchi:
Tolerating Communication Latency through Dynamic Thread Invocation in a Multithreaded Architecture. Compiler Optimizations for Scalable Parallel Systems Languages 2001: 525-552
1990 – 1999
- 1999
- [c26]Andrew Sohn, Yunheung Paek, Jui-Yuan Ku, Yuetsu Kodama, Yoshinori Yamaguchi:
Communication Studies of Single-Threaded and Multithreaded Distributed-Memory Multiprocessors. HPCA 1999: 310-314 - 1998
- [c25]Osamu Tatebe, Yuetsu Kodama, Satoshi Sekiguchi, Yoshinori Yamaguchi:
Highly Efficient Implementation of MPI Point-to-Point Communication Using Remote Memory Operations. International Conference on Supercomputing 1998: 267-273 - [c24]Andrew Sohn, Yuetsu Kodama:
Load Balanced Parallel Radix Sort. International Conference on Supercomputing 1998: 305-312 - [c23]Hayato Yamana, Hanpei Koike, Yuetsu Kodama, Hirofumi Sakane, Yoshinori Yamaguchi:
Fast Speculative Search Engine on the Highly Parallel Computer EM-X. SIGIR 1998: 390 - 1997
- [c22]Yuetsu Kodama, Hirofumi Sakane, Hanpei Koike, Mitsuhisa Sato, Shuichi Sakai, Yoshinori Yamaguchi:
Parallel Execution of Radix Sort Program Using Fine-Grain Communication. IEEE PACT 1997: 136-145 - [c21]Mitsuhisa Sato, Yuetsu Kodama, Hirofumi Sakane, Hayato Yamana, Shuichi Sakai, Yoshinori Yamaguchi:
Experience with Fine-Grain Communication in EM-X Multiprocessor for Parallel Sparse Matrix Computation. IPPS 1997: 242-248 - [c20]Andrew Sohn, Yuetsu Kodama, Jui Ku, Mitsuhisa Sato, Hirofumi Sakane, Hayato Yamana, Shuichi Sakai, Yoshinori Yamaguchi:
Fine-Grain Multithreading with the EM-X Multiprocessor. SPAA 1997: 189-198 - 1996
- [c19]Andrew Sohn, Jui Ku, Yuetsu Kodama, Mitsuhisa Sato, Hirofumi Sakane, Hayato Yamana, Shuichi Sakai, Yoshinori Yamaguchi:
Identifying the capability of overlapping computation with communication. IEEE PACT 1996: 133-138 - 1995
- [j5]Shuichi Sakai, Yuetsu Kodama, Mitsuhisa Sato, Andrew Shaw, Hiroshi Matsuoka, Hideo Hirono, Kazuaki Okamoto, Takashi Yokota:
Reduced Interprocessor-Communication Architecture and its Implementation on EM-4. Parallel Comput. 21(5): 753-769 (1995) - [c18]Hayato Yamana, Mitsuhisa Sato, Yuetsu Kodama, Hirofumi Sakane, Shuichi Sakai, Yoshinori Yamaguchi:
A Macrotask-level Unlimited Speculative Execution on Multiprocessors. International Conference on Supercomputing 1995: 328-337 - [c17]Yuetsu Kodama, Hirohumi Sakane, Mitsuhisa Sato, Hayato Yamana, Shuichi Sakai, Yoshinori Yamaguchi:
The EM-X Parallel Computer: Architecture and Basic Performance. ISCA 1995: 14-23 - 1994
- [c16]Mitsuhisa Sato, Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
EM-C: Programming with Explicit Parallelism and Locality for EM-4 Multiprocessor. IFIP PACT 1994: 3-14 - [c15]Mitsuhisa Sato, Yuetsu Kodama, Yoshinori Yamaguchi, Shuichi Sakai:
Experience with Executing Shared Memory Programs using Fine-Grain Communication and Multithreading in EM-4. IPPS 1994: 630-636 - [c14]Yuetsu Kodama, Hirofumi Sakane, Mitsuhisa Sato, Shuichi Sakai, Yoshinori Yamaguchi:
Message-based efficient remote memory access on a highly parallel computer EM-X. ISPAN 1994: 135-142 - [c13]Andrew Sohn, Mitsuhisa Sato, Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi:
Nonnumeric search results on the EM-4 distributed-memory multiprocessor. SC 1994: 301-310 - [c12]Andrew Sohn, Mitsuhisa Sato, Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi:
Parallel bidirectional heuristic search on the EM-4 multiprocessor. SPDP 1994: 100-107 - [c11]Mitsuhisa Sato, Yuetsu Kodama, Hirofumi Sakane, Yoshinori Yamaguchi, Shuichi Sakai:
Programming with Distributed Data Structure for EM-X Multiprocessor. Theory and Practice of Parallel Programming 1994: 472-483 - 1993
- [j4]Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi:
Design and Implementation of a Circular Omega Network in the EM-4. Parallel Comput. 19(2): 125-142 (1993) - [j3]Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
Evaluation of parallel execution performance by highly parallel computer EM-4. Syst. Comput. Jpn. 24(9): 32-41 (1993) - [c10]Yuetsu Kodama, Yasuhito Koumura, Mitsuhisa Sato, Hirohumi Sakane, Shuichi Sakai, Yoshinori Yamaguchi:
EMC-Y: Parallel Processing Element Optimizing Communication and Computation. International Conference on Supercomputing 1993: 167-174 - [c9]Shuichi Sakai, Kazuaki Okamoto, Hiroshi Matsuoka, Hideo Hirono, Yuetsu Kodama, Mitsuhisa Sato:
Super-Threading: Architectural and Software Mechanisms for Optimizing Parallel Computation. International Conference on Supercomputing 1993: 251-260 - [c8]Shuichi Sakai, Hiroshi Matsuoka, Yuetsu Kodama, Mitsuhisa Sato, Andrew Shaw, Hideo Hirono, Kazuaki Okamoto, Takashi Yokota:
RICA: Reduced Interprocessor-Communication Architecture - Concept and Mechanisms. SPDP 1993: 122-127 - 1992
- [j2]Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
A prototype of a highly parallel dataflow machine EM-4 and its preliminary evaluation. Future Gener. Comput. Syst. 7(2-3): 199-209 (1992) - [j1]Kazuaki Okamoto, Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
Methodologies in development and testing of the dataflow machine EM-4. Parallel Comput. 18(8): 901-912 (1992) - [c7]Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
Evaluation of the EM-4 Highly Parallel Computer using a Game Tree Searching Problem. FGCS 1992: 731-738 - [c6]Mitsuhisa Sato, Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi, Yasuhito Koumura:
Thread-based Programming for the EM-4 Hybrid Dataflow Machine. ISCA 1992: 146-155 - 1991
- [c5]Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi:
Design and Implementation of a Versatile Interconnection Network in the EM-4. ICPP (1) 1991: 426-430 - [c4]Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi:
Prototype Implementation of a Highly Parallel Dataflow Machine EM-4. IPPS 1991: 278-286 - [c3]Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
Load balancing by function distribution on the EM-4 prototype. SC 1991: 522-531
1980 – 1989
- 1989
- [c2]Yoshinori Yamaguchi, Shuichi Sakai, Kei Hiraki, Yuetsu Kodama:
An Architectural Disgn of a Highly Parallel Dataflow Machine. IFIP Congress 1989: 1155-1160 - [c1]Shuichi Sakai, Yoshinori Yamaguchi, Kei Hiraki, Yuetsu Kodama, Toshitsugu Yuba:
An Architecture of a Dataflow Single Chip Processor. ISCA 1989: 46-53
Coauthor Index
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