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Geeng-Lih Lin

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2020 – today

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2021
[c4]
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Chao-Yang Chen, Jian-Hsing Lee, Karuna Nidhi, Tzer-Yaa Bin, Geeng-Lih Lin, Ming-Dou Ker:
Study on the Guard Rings for Latchup Prevention between HV-PMOS and LV-PMOS in a 0.15-µm BCD Process. IRPS 2021: 1-4

2010 – 2019

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2015
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Seian-Feng Liao, Kai-Neng Tang, Ming-Dou Ker, Jia-Rong Yeh, Hwa-Chyi Chiou, Yeh-Jen Huang, Chun-Chien Tsai, Yeh-Ning Jou, Geeng-Lih Lin:
Impact of guard ring layout on the stacked low-voltage PMOS for high-voltage ESD protection. ECCTD 2015: 1-4

2000 – 2009

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2009
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Wen-Yi Chen, Ming-Dou Ker, Yeh-Ning Jou, Yeh-Jen Huang, Geeng-Lih Lin:
Improvement on ESD Robustness of Lateral DMOS in High-voltage CMOS ICs by Body Current Injection. ISCAS 2009: 385-388
2008
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Wen-Yi Chen, Ming-Dou Ker, Yeh-Jen Huang, Yeh-Ning Jou, Geeng-Lih Lin:
Measurement on snapback holding voltage of high-voltage LDMOS for latch-up consideration. APCCAS 2008: 61-64

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