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Robert H. M. van Veldhoven
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2020 – today
- 2024
- [c20]S. Li, Sundeep Javvaji, V. Pecanins-Martinez, E. Aydin, Robert H. M. van Veldhoven, Kofi A. A. Makinwa:
A Beyond-the-rail Audio CTΔΣM with a Passive Input Stage and 99.2dB SNDR. VLSI Technology and Circuits 2024: 1-2 - 2022
- [c19]Shubham Mehrotra, Efraïm Eland, Shoubhik Karmakar, Angqi Liu, Burak Gönen, Muhammed Bolatkale, Robert H. M. van Veldhoven, Kofi A. A. Makinwa:
A 590 µW, 106.6 dB SNDR, 24 kHz BW Continuous-Time Zoom ADC with a Noise-Shaping 4-bit SAR ADC. ESSCIRC 2022: 253-256 - 2021
- [j12]Efraïm Eland
, Shoubhik Karmakar
A 440-μW, 109.8-dB DR, 106.5-dB SNDR Discrete-Time Zoom ADC With a 20-kHz BW. IEEE J. Solid State Circuits 56(4): 1207-1215 (2021) - [j11]Chuanshi Yang
An Area-Efficient SAR ADC With Mismatch Error Shaping Technique Achieving 102-dB SFDR 90.2-dB SNDR Over 20-kHz Bandwidth. IEEE Trans. Very Large Scale Integr. Syst. 29(8): 1575-1585 (2021) - 2020
- [j10]Burak Gönen
A Continuous-Time Zoom ADC for Low-Power Audio Applications. IEEE J. Solid State Circuits 55(4): 1023-1031 (2020) - [j9]Shoubhik Karmakar
A 28-W, -102.2-dB THD+N Class-D Amplifier Using a Hybrid ΔΣM-PWM Scheme. IEEE J. Solid State Circuits 55(12): 3146-3156 (2020) - [c18]Robert H. M. van Veldhoven, Marco Lammers, Leon van der Dussen, Khalid Mabtoul:
9.8 A Low-Cost 4-Channel Reconfigurable Audio Interface for Car Entertainment Systems. ISSCC 2020: 168-170 - [c17]Shoubhik Karmakar, Huajun Zhang
23.4 A 28W -108.9dB/-102.2dB THD/THD+N Hybrid ΔΣ-PWM Class-D Audio Amplifier with 91% Peak Efficiency and Reduced EMI Emission. ISSCC 2020: 350-352 - [c16]Efraïm Eland, Shoubhik Karmakar, Burak Gönen, Robert H. M. van Veldhoven, Kofi A. A. Makinwa:
A 440μW, 109.8dB DR, 106.5dB SNDR Discrete-Time Zoom ADC with a 20kHz BW. VLSI Circuits 2020: 1-2
2010 – 2019
- 2019
- [c15]Burak Gönen, Shoubhik Karmakar, Robert H. M. van Veldhoven, Kofi A. A. Makinwa:
A Low Power Continuous-Time Zoom ADC for Audio Applications. VLSI Circuits 2019: 224- - 2018
- [j8]Zeyu Cai
A Phase-Domain Readout Circuit for a CMOS-Compatible Hot-Wire CO2 Sensor. IEEE J. Solid State Circuits 53(11): 3303-3313 (2018) - [j7]Shoubhik Karmakar
A 280 µW Dynamic Zoom ADC With 120 dB DR and 118 dB SNDR in 1 kHz BW. IEEE J. Solid State Circuits 53(12): 3497-3507 (2018) - [c14]Shoubhik Karmakar, Burak Gonen, Fabio Sebastiano
A 280μW dynamic-zoom ADC with 120dB DR and 118dB SNDR in 1kHz BW. ISSCC 2018: 238-240 - [c13]Zeyu Cai, Robert H. M. van Veldhoven, Hilco Suy, Ger de Graaf, Kofi A. A. Makinwa, Michiel A. P. Pertijs:
A phase-domain readout circuit for a CMOS-compatible thermal-conductivity-based carbon dioxide sensor. ISSCC 2018: 332-334 - 2017
- [j6]Burak Gonen
A Dynamic Zoom ADC With 109-dB DR for Audio Applications. IEEE J. Solid State Circuits 52(6): 1542-1550 (2017) - 2016
- [j5]Zeyu Cai
A Ratiometric Readout Circuit for Thermal-Conductivity-Based Resistive CO2 Sensors. IEEE J. Solid State Circuits 51(10): 2463-2474 (2016) - [c12]Burak Gonen, Fabio Sebastiano
15.7 A 1.65mW 0.16mm2 dynamic zoom-ADC with 107.5dB DR in 20kHz BW. ISSCC 2016: 282-283 - 2015
- [c11]Zeyu Cai, Robert H. M. van Veldhoven, Annelies Falepin, Hilco Suy, Eric Sterckx, Kofi A. A. Makinwa, Michiel A. P. Pertijs:
A ratiometric readout circuit for thermal-conductivity-based resistive gas sensors. ESSCIRC 2015: 275-278 - 2014
- [c10]Fabio Sebastiano
17.5 A 0.07mm2 2-channel instrumentation amplifier with 0.1% gain matching in 0.16μm CMOS. ISSCC 2014: 294-295 - 2013
- [c9]Fabio Sebastiano
A 0.1-mm2 3-channel area-optimized ΣΔ ADC in 0.16-µm CMOS with 20-kHz BW and 86-dB DR. ESSCIRC 2013: 375-378 - [c8]Selcuk Ersoy, Robert H. M. van Veldhoven, Fabio Sebastiano
A 0.25mm2 AC-biased MEMS microphone interface with 58dBA SNR. ISSCC 2013: 382-383 - [c7]Robert H. M. van Veldhoven:
Sensors for automotive applications: Challenges and solutions. IWASI 2013: 115-116 - 2011
- [j4]Yongjian Tang, Joost Briaire, Kostas Doris, Robert H. M. van Veldhoven, Pieter C. W. van Beek, Hans Hegt, Arthur H. M. van Roermund:
A 14 bit 200 MS/s DAC With SFDR > 78 dBc, IM3 < - 83 dBc and NSD < - 163 dBm/Hz Across the Whole Nyquist Band Enabled by Dynamic-Mismatch Mapping. IEEE J. Solid State Circuits 46(6): 1371-1381 (2011)
2000 – 2009
- 2008
- [c6]Robert Rutten, Lucien J. Breems, Robert H. M. van Veldhoven:
Digital jitter-cancellation for narrowband signals. ISCAS 2008: 1444-1447 - [c5]Robert H. M. van Veldhoven, Robert Rutten, Lucien J. Breems:
An Inverter-Based Hybrid ΔΣ Modulator. ISSCC 2008: 492-493 - 2007
- [j3]Lucien J. Breems, Robert Rutten, Robert H. M. van Veldhoven, Gerard van der Weide:
A 56 mW Continuous-Time Quadrature Cascaded ΣΔ Modulator With 77 dB DR in a Near Zero-IF 20 MHz Band. IEEE J. Solid State Circuits 42(12): 2696-2705 (2007) - [c4]Lucien J. Breems, Robert Rutten, Robert H. M. van Veldhoven, Gerard van der Weide, Henk A. H. Termeer:
A 56mW CT Quadrature Cascaded ΣΔ Modulator with 77dB DR in a Near Zero-IF 20MHz Band. ISSCC 2007: 238-599 - [c3]Sotir Ouzounov, Robert H. M. van Veldhoven, Corné Bastiaansen, K. Vongehr, Roland Van Wegberg, Govert Geelen, Lucien J. Breems, Arthur H. M. van Roermund:
A 1.2V 121-Mode CT ΔΣ Modulator for Wireless Receivers in 90nm CMOS. ISSCC 2007: 242-600 - 2006
- [c2]Lucien J. Breems, Robert H. M. van Veldhoven, Kathleen Philips, Robert Rutten, Gunnar Wetzker:
Continuous-time Sigma-Delta Modulators for Highly Digitised Receivers. ICECS 2006: 41-45 - [c1]Robert H. M. van Veldhoven, Peter Nuijten, Paul T. M. van Zeijl:
The effect of clock jitter on the DR of Sigma Delta modulators. ISCAS 2006 - 2003
- [j2]Robert H. M. van Veldhoven:
A triple-mode continuous-time ΣΔ modulator with switched-capacitor feedback DAC for a GSM-EDGE/CDMA2000/UMTS receiver. IEEE J. Solid State Circuits 38(12): 2069-2076 (2003) - 2002
- [j1]Robert H. M. van Veldhoven, Brian J. Minnis, Johannes A. (Hans) Hegt, Arthur H. M. van Roermund:
A 3.3-mW ΣΔ modulator for UMTS in 0.18-μm CMOS with 70-dB dynamic range in 2-MHz bandwidth. IEEE J. Solid State Circuits 37(12): 1645-1652 (2002)
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last updated on 2024-10-18 19:32 CEST by the dblp team
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