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Renqiu Huang

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2000 – 2009

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2006
[c9]
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Renqiu Huang, Ranga Vemuri:
Transformation synthesis for data intensive applications to FPGAs. ACM Great Lakes Symposium on VLSI 2006: 349-352
2005
[c8]
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Renqiu Huang, Ranga Vemuri:
PAHLS: Towards Run-Time Synthesis for FPGAs. FPL 2005: 739-740
[c7]
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Renqiu Huang, Ranga Vemuri:
Sensitivity Analysis of a Cluster-Based Interconnect Model for FPGAs. ISVLSI 2005: 250-251
[c6]
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Renqiu Huang, Ranga Vemuri:
On-Line Synthesis for Partially Reconfigurable FPGAs. VLSI Design 2005: 663-668
2004
[c5]
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Jawad Khan, Jayanthi Rajagopalan, Renqiu Huang, Ranga Vemuri:
A Portable Face Recognition System Using Reconfigurable Hardware. ERSA 2004: 213-217
[c4]
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Renqiu Huang, Manish Handa, Ranga Vemuri:
Analysis of a Hybrid Interconnect Architecture for Dynamically Reconfigurable FPGAs. FPL 2004: 900-905
[c3]
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Renqiu Huang, Ranga Vemuri:
Analysis and evaluation of a hybrid interconnect structure for FPGAs. ICCAD 2004: 595-601
[c2]
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Renqiu Huang, Ranga Vemuri:
Forward-Looking Macro Generation and Relational Placement During High Level Synthesis to FPGAs. IPDPS 2004
2003
[c1]
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Renqiu Huang, Tommy Cheung, Ted Chi-Wah Kok:
A Statistical Analysis Tool for FPLD Architectures. FPL 2003: 1000-1003

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