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Chin-Fu Chen
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2010 – 2019
- 2014
- [c7]Ching-Hu Yang, Chung-Shing Wang, Chin-Fu Chen, P. Y. Lin, Chung-Chuan Wang:
Fuzzy decision making in shape feature design for product development. IEEM 2014: 580-584
2000 – 2009
- 2009
- [j10]Zhidian Du, Lin Li, Chin-Fu Chen, Philip S. Yu, James Z. Wang:
G-SESAME: web tools for GO-term-based gene similarity analysis and knowledge discovery. Nucleic Acids Res. 37(Web-Server-Issue): 345-349 (2009) - 2007
- [j9]Feng Luo, Yunfeng Yang, Chin-Fu Chen, Roger L. Chang
, Jizhong Zhou
Modular organization of protein interaction networks. Bioinform. 23(2): 207-214 (2007) - [j8]Feng Luo, Yunfeng Yang, Chin-Fu Chen, Roger L. Chang, Jizhong Zhou
Modular organization of protein interaction networks. Bioinform. 23(7): 916 (2007) - [j7]James Zijun Wang, Zhidian Du, Rapeeporn Payattakool, Philip S. Yu, Chin-Fu Chen:
A new method to measure the semantic similarity of GO terms. Bioinform. 23(10): 1274-1281 (2007) - [c6]James Zijun Wang, Zhidian Du, Philip S. Yu, Chin-Fu Chen:
An Efficient Online Tool to Search Top-N Genes with Similar Biological Functions in Gene Ontology Database. BIBM 2007: 406-411 - 2006
- [j6]Chin-Fu Chen, Xin Feng, Jack Szeto:
Identification of critical genes in microarray experiments by a Neuro-Fuzzy approach. Comput. Biol. Chem. 30(5): 372-381 (2006) - 2005
- [j5]Norberto de la Cruz, Susan Bromberg, Dean Pasko, Mary Shimoyama, Simon N. Twigger
The Rat Genome Database (RGD): developments towards a phenome database. Nucleic Acids Res. 33(Database-Issue): 485-491 (2005) - 2002
- [j4]Simon N. Twigger
Rat Genome Database (RGD): mapping disease onto the genome. Nucleic Acids Res. 30(1): 125-128 (2002)
1990 – 1999
- 1992
- [j3]Rakesh Chadha, Chandramouli Visweswariah, Chin-Fu Chen:
M3-a multilevel mixed-mode mixed A/D simulator. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(5): 575-585 (1992)
1980 – 1989
- 1989
- [j2]Laurence E. Bays, Chin-Fu Chen, Evelyn M. Fields, Renato N. Gadenz, W. Patrick Hays, Howard S. Moscovitz, Thomas G. Szymanski:
Post-layout verification of the WE DSP32 digital signal processor. IEEE Des. Test 6(1): 56-66 (1989) - 1988
- [c5]Foong-Charn Chang, Chin-Fu Chen, Prasad Subramaniam:
An Accurate and Efficient Gate Level Delay Calculator for MOS Circuits. DAC 1988: 282-287 - [c4]Chandramouli Visweswariah, Rakesh Chadha, Chin-Fu Chen:
Model Development and Verification for High Level Analog Blocks. DAC 1988: 376-382 - [c3]Rakesh Chadha, Chin-Fu Chen:
M3-a multilevel mixed-mode mixed D/A simulator. ICCAD 1988: 258-261 - [c2]Rakesh Chadha, Chin-Fu Chen:
Extension of a transistor level digital timing simulator to include first order analog behavior. ICCD 1988: 116-119 - 1986
- [j1]David Tsao, Chin-Fu Chen:
A Fast-Timing Simulator for Digital MOS Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 5(4): 536-540 (1986) - 1984
- [c1]Chin-Fu Chen, Chi-Yuan Lo, Hao N. Nham, Prasad Subramaniam:
The second generation motis mixed-mode simulator. DAC 1984: 10-17
Coauthor Index
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