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Journal of Signal Processing Systems, Volume 62
Volume 62, Number 1, January 2011
- Shao-Yi Chien
, Shorin Kyo, Tsung-Han Tsai:
Guest Editorial: Special Issue on Computing Architectures for Real-Time Video/Image Analysis. 1-3 - Shorin Kyo, Shin'ichiro Okazaki:
IMAPCAR: A 100 GOPS In-Vehicle Vision Processor Based on 128 Ring Connected Four-Way VLIW Processing Elements. 5-16 - Anteneh A. Abbo, Richard P. Kleihorst, Ben Schueler:
Xetal-II: A Low-Power Massively-Parallel Processor for Video Scene Analysis. 17-27 - Abelardo López-Lagunas, Sek M. Chai:
Streaming Data Movement for Real-Time Image Analysis. 29-42 - Karthik Nagarajan, Brian Holland, Alan D. George
Accelerating Machine-Learning Algorithms on FPGAs using Pattern-Based Decomposition. 43-63 - Senyo Apewokin, Brian Valentine, Jee Choi, Linda M. Wills, D. Scott Wills:
Real-Time Adaptive Background Modeling for Multicore Embedded Systems. 65-76 - Shao-Yi Chien
Reconfigurable Morphological Image Processing Accelerator for Video Object Segmentation. 77-96 - Tsung-Han Tsai, Chung-Yuan Lin, Yu Fong Lin:
System Level Design and Implementation for Region-of-Interest Segmentation. 97-112
Volume 62, Number 2, February 2011
- A. Prasad Vinod
Special Issue on Signal Processing for Software Defined Radio Handsets. 113-115 - Babita R. Jose, Jimson Mathew, P. Mythili:
A Multi-Mode Sigma-Delta ADC for GSM/WCDMA/WLAN Applications. 117-130 - S. Ramasamy, B. Venkataramani:
A Low Power Reconfigurable Analog Baseband Block for Software Defined Radio. 131-144 - Zhe Wang, Sana Salous:
Spectrum Occupancy Statistics and Time Series Models for Cognitive Radio. 145-155 - R. Mahesh, A. Prasad Vinod
Filter Bank Channelizers for Multi-Standard Software Defined Radio Receivers. 157-171 - Laurent Alaus, Jacques Palicot, Christian Roland, Yves Louët, Dominique Noguet:
Promising Technique of Parameterization For Reconfigurable Radio, the Common Operators Technique: Fundamentals and Examples. 173-185 - Amir Eghbali, Håkan Johansson, Per Löwenborg, Heinz G. Göckler:
Dynamic Frequency-Band Reallocation and Allocation: from Satellite-Based Communication Systems to Cognitive Radios. 187-203 - Mengda Lin, A. Prasad Vinod
A New Flexible Filter Bank for Low Complexity Spectrum Sensing in Cognitive Radios. 205-215 - Smitha K. G.
A Low Complexity Reconfigurable Multi-stage Channel Filter Architecture for Resource-Constrained Software Radio Handsets. 217-231 - Kiarash Amiri, Joseph R. Cavallaro
A High Throughput Configurable SDR Detector for Multi-user MIMO Wireless Systems. 233-245 - Ernest Kurniawan, A. S. Madhukumar
Low Complexity Antenna Selection Scheme for Multicarrier MIMO Broadcast Communication. 247-262
Volume 62, Number 3, March 2011
- Alfonso Cesar B. Albason, Danny Wen-Yaw Chung, Andrew Shyh-Liang Lou:
A 2 MHz Wireless CMOS Transceiver for Implantable Biosignal Sensing Systems. 263-272 - Yong-Kyu Jung:
Hardware/Software Co-reconfigurable Instruction Decoder for Adaptive Multi-core DSP Architectures. 273-285 - Srdjan Jovanovski, Veselin N. Ivanovic
Signal Adaptive Pipelined Hardware Design of Time-Varying Optimal Filter for Highly Nonstationary FM Signal Estimation. 287-300 - Svetislav Momcilovic
Modeling and Evaluating Non-shared Memory CELL/BE Type Multi-core Architectures for Local Image and Video Processing. 301-318 - Francisco Javier López-Martínez
Iterative-Gradient Based Complex Divider FPGA Core with Dynamic Configurability of Accuracy and Throughput. 319-324 - Meilin Liu, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Yi He, Meikang Qiu:
Loop Distribution and Fusion with Timing and Code Size Optimization. 325-340 - Bertrand Le Gal, Emmanuel Casseau:
Word-Length Aware DSP Hardware Design Flow Based on High-Level Synthesis. 341-357 - Wei-Chung Wen, Hsu-Feng Hsiao:
Hierarchical Optimization of Cascading Error Protection Scheme for H.264 Scalable Video Streaming. 359-371 - David Chih-Wei Chang, Tay-Jyi Lin, Chung-Ju Wu, Jenq Kuen Lee, Yuan-Hua Chu, An-Yeu Wu
Parallel Architecture Core (PAC) - the First Multicore Application Processor SoC in Taiwan Part I: Hardware Architecture & Software Development Tools. 373-382 - Jia-Ming Chen, Chun-Nan Liu, Jen-Kuei Yang, Shau-Yin Tseng, Wei-Kuan Shih, An-Yeu Wu
Parallel Architecture Core (PAC) - the First Multicore Application Processor SoC in Taiwan Part II: Application Programming. 383-402 - Yui-Lam Chan
A New Dual-bitstream Video Streaming System with VCR Functionalities Using SP/SI-frames. 403-414 - Periklis Liaskovitis, Curt Schurgers:
Efficient Sensing Topology Management for Spatial Monitoring with Sensor Networks. 415-426 - Di-You Wu, Lan-Da Van:
Efficient Detection Algorithms for MIMO Communication Systems. 427-442 - Gustavo A. Ruiz
An Efficient VLSI Architecture of Fractional Motion Estimation in H.264 for HDTV. 443-457 - Kai Man Tsui, Shing-Chow Chan:
A Versatile Iterative Framework for the Reconstruction of Bandlimited Signals from Their Nonuniform Samples. 459-468
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