default search action
IEEE Transactions on Computers, Volume 53
Volume 53, Number 1, January 2004
- Victor De La Luz, Mahmut T. Kandemir:
Array Regrouping and Its Use in Compiling Data-Intensive Embedded Applications. 1-19 - Zhiyong Xu, Sohum Sohoni, Rui Min, Yiming Hu:
An Analysis of Cache Performance of Multimedia Applications. 20-38 - Hong-Chun Hsu, Tseng-Kuei Li, Jimmy J. M. Tan, Lih-Hsing Hsu:
Fault Hamiltonicity and Fault Hamiltonian Connectivity of the Arrangement Graphs. 39-53 - Yung-Ruei Chang, Suprasad V. Amari, Sy-Yen Kuo:
Computing System Failure Frequencies and Reliability Importance Measures Using OBDD. 54-68
- Thambipillai Srikanthan, Siew Kei Lam, Mishra Suman:
Area-Time Efficient Sign Detection Technique for Binary Signed-Digit Number System. 69-72 - Mark Brehob, Stephen Wagner, Eric Torng, Richard J. Enbody:
Optimal Replacement Is NP-Hard for Nonstandard Caches. 73-76 - Yin-Fu Huang, Jiing-Maw Huang:
Disk Scheduling onMultimedia Storage Servers. 77-82 - Irith Pomeranz, Sandip Kundu, Sudhakar M. Reddy:
Masking of Unknown Output Values during Output Response Compression byUsing Comparison Units. 83-88 - Paolo Santi, Stefano Chessa:
Reducing the Number of Sequential Diagnosis Iterations in Hypercubes. 89-92
Volume 53, Number 2, February 2004
- Peter-Michael Seidel, Guy Even:
Delay-Optimized Implementation of IEEE Floating-Point Addition. 97-113 - Pedro Marcuello, Antonio González, Jordi Tubella:
Thread Partitioning and Value Prediction for Exploiting Speculative Thread-Level Parallelism. 114-125 - Viji Srinivasan, Edward S. Davidson, Gary S. Tyson:
A Prefetch Taxonomy. 126-140 - Bruce R. Childers, Jack W. Davidson:
Custom Wide Counterflow Pipelines for High-Performance Embedded Applications. 141-158 - Haruhiko Kaneko, Eiji Fujiwara:
A Class of M-Ary Asymmetric Symbol Error Correcting Codes for Data Entry Devices. 159-167 - Dharmesh Parikh, Kevin Skadron, Yan Zhang, Mircea R. Stan:
Power-Aware Branch Prediction: Characterization and Design. 168-186 - Chang-Gun Lee, Lui Sha, Avinash Peddi:
Enhanced Utilization Bounds for QoS Management. 187-200 - Binoy Ravindran, Peng Li:
DPR, LPR: Proactive Resource Allocation Algorithms for Asynchronous Real-Time Distributed Systems. 201-216 - Rami G. Melhem, Daniel Mossé, E. N. Elnozahy:
The Interplay of Power Management and Fault Recovery in Real-Time Systems. 217-231 - Wen-Guey Tzeng:
Efficient 1-Out-of-n Oblivious Transfer Schemes with Universally Usable Parameters. 232-240
Volume 53, Number 3, March 2004
- Bhaskar Krishnamachari, S. Sitharama Iyengar:
Distributed Bayesian Algorithms for Fault-Tolerant Event Region Detection in Wireless Sensor Networks. 241-250 - David M. Harris:
An Exponentiation Unit for an OpenGL Lighting Engine. 251-258 - Huan-Yun Wei, Shih-Chiang Tsao, Ying-Dar Jason Lin:
Assessing and Improving TCP Rate Shaping over Edge Gateways. 259-275 - Dong Xiang, Janak H. Patel:
Partial Scan Design Based on Circuit State Information and Functional Analysis. 276-287 - Daehyun Kim, Mainak Chaudhuri, Mark A. Heinrich, Evan Speight:
Architectural Support for Uniprocessor and Multiprocessor Active Memory Systems. 288-307 - Yong Jiang, Jie Li, Shoichi Nishimura:
A General Stochastic Model for Dynamic Locking in Database Systems. 308-319 - Thomas Clouqueur, Kewal K. Saluja, Parameswaran Ramanathan:
Fault Tolerance in Collaborative Sensor Networks for Target Detection. 320-333 - Tarek F. Abdelzaher, Vivek Sharma, Chenyang Lu:
A Utilization Bound for Aperiodic Tasks and Priority Driven Scheduling. 334-350 - Sartaj Sahni, Kun Suk Kim:
An O(log n) Dynamic Router-Table Design. 351-363 - Veradej Phipatanasuphorn, Parameswaran Ramanathan:
Vulnerability of Sensor Networks to Unauthorized Traversal and Monitoring. 364-369 - Costas Efstathiou, Haridimos T. Vergos, Dimitris Nikolos:
Modified Booth Modulo 2n-1 Multipliers. 370-374 - Chien-Hsing Wu, Chien-Ming Wu, Ming-Der Shieh, Yin-Tsung Hwang:
High-Speed, Low-Complexity Systolic Designs of Novel Iterative Division Algorithms in GF(2^m). 375-380 - Xiaolin Teng, Hoang Pham:
A Software Cost Model for Quantifying the Gain with Considerations of Random Field Environments. 380-384
Volume 53, Number 4, April 2004
- Pei-Yin Chen:
VLSI Implementation for One-Dimensional Multilevel Lifting-Based Wavelet Transform. 386-398 - Jinson Koppanalil, Eric Rotenberg:
A Simple Mechanism for Detecting Ineffectual Instructions in Slipstream Processors. 399-413 - Yuanyuan Yang, Jianchao Wang:
Fault-Tolerant Rearrangeable Permutation Network. 414-426 - Ching-Tien Ho, Larry J. Stockmeyer:
A New Approach to Fault-Tolerant Wormhole Routing for Mesh-Connected Parallel Computers. 427-439 - Jong Won Park:
Multiaccess Memory System for Attached SIMD Computer. 439-452 - Rachid Guerraoui, Michel Raynal:
The Information Structure of Indulgent Consensus. 453-466 - Luca Benini, Francesco Menichelli, Mauro Olivieri:
A Class of Code Compression Schemes for Reducing Power Consumption in Embedded Microprocessor Systems. 467-482 - Massimo Franceschetti, Matthew Cook, Jehoshua Bruck:
A Geometric Theorem for Network Design. 483-489 - Jong-Chul Jeong, Woo-Chan Park, Woong Jeong, Tack-Don Han, Moon Key Lee:
A Cost-Effective Pipelined Divider with a Small Lookup Table. 483-489 - C. Mani Krishna, Yann-Hang Lee:
Addendum to Voltage-Clock-Scaling Adaptive Scheduling Techniques for Low Power in Hard Real-Time Systems. 496-
Volume 53, Number 5, May 2004
- Pascal Felber, Priya Narasimhan:
Experiences, Strategies, and Challenges in Building Fault-Tolerant CORBA Systems. 497-511 - Martin Hiller, Arshad Jhumka, Neeraj Suri:
EPIC: Profiling the Propagation and Effect of Data Errors in Software. 512-530 - Cecilia Metra, Stefano Di Francescantonio, T. M. Mak:
Implications of Clock Distribution Faults and Issues with Screening Them during Manufacturing Testing. 531-546 - Jingling Xue, Xavier Vera:
Efficient and Accurate Analytical Modeling of Whole-Program Data Cache Behavior. 547-566 - Ming Xiong, Krithi Ramamritham:
Deriving Deadlines and Periods for Real-Time Update Transactions. 567-583 - Hakan Aydin, Rami G. Melhem, Daniel Mossé, Pedro Mejía-Alvarez:
Power-Aware Scheduling for Periodic Real-Time Tasks. 584-600 - Geyong Min, Mohamed Ould-Khaoua:
A Performance Model for Wormhole-Switched Interconnection Networks under Self-Similar Traffic. 601-613 - Ali Y. Duale, M. Ümit Uyar:
A Method Enabling Feasible Conformance Test Sequence Generation for EFSM Models. 614-627 - Katarzyna Radecka, Zeljko Zilic:
Design Verification by Test Vectors and Arithmetic Transform Universal Test Set. 628-640
Volume 53, Number 6, June 2004
- Youssef Saab:
An Effective Multilevel Algorithm for Bisecting Graphs and Hypergraphs. 641-652 - Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad Ghose:
Complexity-Effective Reorder Buffer Designs for Superscalar Processors. 653-665 - Braden Phillips, Neil Burgess:
Minimal Weight Digit Set Conversions. 666-677 - Ren-Cang Li:
Near Optimality of Chebyshev Interpolation for Elementary Function Computations. 678-687 - Gi-Joon Nam, Fadi A. Aloul, Karem A. Sakallah, Rob A. Rutenbar:
A Comparative Study of Two Boolean Formulations of FPGA Detailed Routing Constraints. 688-696 - Dmitry V. Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose:
Isolating Short-Lived Operands for Energy Reduction. 697-709 - Bin Liu, Fabrizio Lombardi, Nohpill Park, Minsu Choi:
Testing Layered Interconnection Networks. 710-722 - Yue Luo, Lizy Kurian John:
Locality-Based Online Trace Compression. 723-731 - Xiaogang Qiu, Michel Dubois:
Tolerating Late Memory Traps in Dynamically Scheduled Processors. 732-743 - Richard West, Yuting Zhang, Karsten Schwan, Christian Poellabauer:
Dynamic Window-Constrained Scheduling of Real-Time Streams in Media Servers. 744-759 - Benoît Chevallier-Mames, Mathieu Ciet, Marc Joye:
Low-Cost Solutions for Preventing Simple Side-Channel Analysis: Side-Channel Atomicity. 760-768 - Jean-Claude Bajard, Laurent Imbert:
A Full RNS Implementation of RSA. 769-774 - Chunsheng Liu, Krishnendu Chakrabarty:
Compact Dictionaries for Fault Diagnosis in Scan-BIST. 775-780 - Sanjoy K. Baruah:
Optimal Utilization Bounds for the Fixed-Priority Scheduling of Periodic Task Systems on Identical Multiprocessors. 781-784
Volume 53, Number 7, July 2004
- Saswati Sarkar, Leandros Tassiulas:
Fair Bandwidth Allocation for Multicasting in Networks with Discrete Feasible Set. 785-814 - Alexandre Yakovlev, Stephen B. Furber, René Krenz, Alexandre V. Bystrov:
Design and Analysis of a Self-Timed Duplex Communication System. 798-814 - Mikel Larrea, Antonio Fernández, Sergio Arévalo:
On the Implementation of Unreliable Failure Detectors in Partially Synchronous Systems. 815-828 - Nak-Woong Eum, Taewhan Kim, Chong-Min Kyung:
CeRA: A Router for Symmetrical FPGAs Based on Exact Routing Density Evaluation. 829-842 - Zhao Zhang, Zhichun Zhu, Xiaodong Zhang:
Design and Optimization of Large Size and Low Overhead Off-Chip Caches. 843-855 - Jacob R. Lorch, Alan Jay Smith:
PACE: A New Approach to Dynamic Voltage Scaling. 856-869 - J. P. Grossman:
Analytically Modeling a Fault-Tolerant Messaging Protocol. 870-878 - Luciano Lenzini, Enzo Mingozzi, Giovanni Stea:
Design and Performance Analysis of the Generalized Timed Token Service Discipline. 879-891 - Dmitry V. Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose:
Energy Efficient Comparators for Superscalar Datapaths. 892-904 - Yongdae Kim, Adrian Perrig, Gene Tsudik:
Group Key Agreement Efficient in Communication. 905-921 - Jehn-Ruey Jiang:
On the Nondomination of Cohorts Coteries. 922-923 - André Seznec:
Concurrent Support of Multiple Page Sizes on a Skewed Associative TLB. 924-927 - (Withdrawn) Notice of Violation of IEEE publication Principles in "Performance Enhancement of Ad Hoc Networks with Localized Route Repair". 928-
Volume 53, Number 8, August 2004
- Qing Zhao, David J. Lilja:
Static Classification of Value Predictability Using Compiler Hints. 929-944 - Arash Reyhani-Masoleh, M. Anwar Hasan:
Low Complexity Bit Parallel Architectures for Polynomial Basis Multiplication over GF(2^{m}). 945-959 - Antonio Gentile, D. Scott Wills:
Portable Video Supercomputing. 960-973 - Taliver Heath, Eduardo Pinheiro, Jerry Hom, Ulrich Kremer, Ricardo Bianchini:
Code Transformations for Energy-Efficient Device Management. 974-987 - Tomás Lang, Javier D. Bruguera:
Floating-Point Multiply-Add-Fused with Reduced Latency. 988-1003 - Victor V. Zyuban, David M. Brooks, Viji Srinivasan, Michael Gschwind, Pradip Bose, Philip N. Strenski, Philip G. Emma:
Integrated Analysis of Power and Performance for Pipelined Microprocessors. 1004-1016 - Urs Anliker, Jan Beutel, Matthias Dyer, Rolf Enzler, Paul Lukowicz, Lothar Thiele, Gerhard Tröster:
A Systematic Approach to the Design of Distributed Wearable Systems. 1017-1033 - Jia Lee, Ferdinand Peper, Susumu Adachi, Kenichi Morita:
Universal Delay-Insensitive Circuits with Bidirectional and Buffering Lines. 1034-1046 - Kenny Fong, Darrel Hankerson, Julio López, Alfred Menezes:
Field Inversion and Point Halving Revisited. 1047-1059 - Julie J. C. H. Ryan:
Information Security Tools and Practices: What Works?. 1060-1063 - Pao-Lien Lai, Jimmy J. M. Tan, Chang-Hsiung Tsai, Lih-Hsing Hsu:
The Diagnosability of the Matching Composition Network under the Comparison Diagnosis Model. 1064-1069 - Nicolas Brisebarre, Jean-Michel Muller, Saurabh Kumar Raina:
Accelerating Correctly Rounded Floating-Point Division when the Divisor Is Known in Advance. 1069-1072
Volume 53, Number 9, September 2004
- Yonghong Song, Rong Xu, Cheng Wang, Zhiyuan Li:
Improving Data Locality by Array Contraction. 1073-1084 - José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera:
Algorithm and Architecture for Logarithm, Exponential, and Powering Computation. 1085-1096 - Berk Sunar:
A Generalized Method for Constructing Subquadratic Complexity GF(2^k) Multipliers. 1097-1105 - Juan A. Carrasco:
Transient Analysis of Some Rewarded Markov Models Using Randomization with Quasistationarity Detection. 1106-1120 - Irith Pomeranz, Sudhakar M. Reddy:
On Maximizing the Fault Coverage for a Given Test Length Limit in a Synchronous Sequential Circuit. 1121-1133 - Dirk Niggemeyer, Elizabeth M. Rudnick:
Automatic Generation of Diagnostic Memory Tests Based on Fault Decomposition and Output Tracing. 1134-1146 - Marisa Llorens, Javier Oliver:
Structural and Dynamic Changes in Concurrent Systems: Reconfigurable Petri Nets. 1147-1158 - Peng Li, Binoy Ravindran:
Fast, Best-Effort Real-Time Scheduling Algorithms. 1159-1175 - Arnold L. Rosenberg:
On Scheduling Mesh-Structured Computations for Internet-Based Computing. 1176-1186 - Vir V. Phoha, Amit U. Nadgar, Asok Ray, Shashi Phoha:
Supervisory Control of Software Systems. 1187-1199 - Pradeep Varma, B. S. Panwar, K. N. Ramganesh:
Cutting Metastability Using Aperture Transformation. 1200-1204 - Luca Macchiarulo, Shih-Min Shu, Malgorzata Marek-Sadowska:
Pipelining Sequential Circuits with Wave Steering. 1205-1210 - Costas Efstathiou, Haridimos T. Vergos, Dimitris Nikolos:
Fast Parallel-Prefix Modulo 2^n+1 Adders. 1211-1216
Volume 53, Number 10, October 2004
- Haibin Lu, Sartaj Sahni:
O(log n) Dynamic Router-Tables for Prefixes and Ranges. 1217-1230 - Selçuk Baktir, Berk Sunar:
Optimal Tower Fields. 1231-1243 - Teresa Monreal, Víctor Viñals, José González, Antonio González, Mateo Valero:
Late Allocation and Early Release of Physical Registers. 1244-1259 - Kasidit Chanchio, Xian-He Sun:
Communication State Transfer for the Mobility of Concurrent Heterogeneous Computing. 1260-1273 - Rama Sangireddy, Huesung Kim, Arun K. Somani:
Low-Power High-Performance Reconfigurable Computing Cache Architectures. 1274-1290 - G. Robert Redinbo, Cung Nguyen:
Concurrent Error Detection in Wavelet Lifting Transforms. 1291-1302 - Takashi Okumura, Daniel Mossé:
Virtualizing Network I/O on End-Host Operating System: Operating System Support forNetwork Control and Resource Protection. 1303-1316 - Shiuh-Jeng Wang:
Anonymous Wireless Authentication on a Portable Cellular Mobile System. 1317-1329 - Robert M. Hierons:
Testing from a Nondeterministic Finite State Machine Using Adaptive State Counting. 1330-1342 - Jie Wu, Fei Dai:
A Generic Distributed Broadcast Scheme in Ad Hoc Wireless Networks. 1343-1354 - Giuseppe Anastasi, Alberto Bartoli, Giacomo Giannini:
On Causal Broadcasting with Positive Acknowledgments and Bounded-Length Counters. 1355-1358 - Roberto Baldoni:
Response to Comment on "A Positive Acknowledgment Protocol for Causal Broadcasting". 1358
Volume 53, Number 11, November 2004
- Peter Y. K. Cheung, George A. Constantinides, José T. de Sousa:
Guest Editors' Introduction: Field Programmable Logic and Applications. 1361-1362 - Stamatis Vassiliadis, Stephan Wong, Georgi Gaydadjiev, Koen Bertels, Georgi Kuzmanov, Elena Moscu Panainte:
The MOLEN Polymorphic Processor. 1363-1375 - John Teifel, Rajit Manohar:
An Asynchronous Dataflow FPGA Architecture. 1376-1392 - Christoph Steiger, Herbert Walder, Marco Platzner:
Operating Systems for Reconfigurable Embedded Platforms: Online Scheduling of Real-Time Tasks. 1393-1407 - Henry Styles, Wayne Luk:
Exploiting Program Branch Probabilities in Hardware Compilation. 1408-1419 - Joonseok Park, Pedro C. Diniz, K. R. Shesha Shayee:
Performance and Area Modeling of Complete FPGA Designs in the Presence of Loop Transformations. 1420-1435 - Carl Ebeling, Chris Fisher, Guanbin Xing, Manyuan Shen, Hui Liu:
Implementing an OFDM Receiver on the RaPiD Reconfigurable Architecture. 1436-1448 - Iouliia Skliarova, António de Brito Ferrari:
Reconfigurable Hardware SAT Solvers: A Survey of Systems. 1449-1461
- Enrico Bini, Giorgio C. Buttazzo:
Schedulability Analysis of Periodic Fixed Priority Systems. 1462-1473 - Dan Page, Nigel P. Smart:
Parallel Cryptographic Arithmetic Using a Redundant Montgomery Representation. 1474-1482 - Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey:
Efficient Design Diversity Estimation for Combinational Circuits. 1483-1492
- Feng Bao:
Cryptanalysis of a Partially Known Cellular Automata Cryptosystem. 1493-1497 - Irith Pomeranz, Sudhakar M. Reddy:
A Measure of Quality for n-Detection Test Sets. 1497-1503
Volume 53, Number 12, December 2004
- Mahmoud Méribout, Masato Motomura:
A Combined Approach to High-Level Synthesis for Dynamically Reconfigurable Systems. 1508-1522 - Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y. K. Cheung:
A Gaussian Noise Generator for Hardware-Based Simulations. 1523-1534 - Hettihe P. Dharmasena, Ramachandran Vaidyanathan:
Lower Bounds on the Loading of Multiple Bus Networks for Binary Tree Algorithms. 1535-1546 - Yuanyuan Yang, Jianchao Wang:
Designing WDM Optical Interconnects with Full Connectivity by Using Limited Wavelength Conversion. 1547-1556 - Alan Messer, Philippe Bernadat, Guangrui Fu, DeQing Chen, Zoran Dimitrijevic, David Jeun Fung Lie, Durga Mannaru, Alma Riska, Dejan S. Milojicic:
Susceptibility of Commodity Systems and Software to Memory Soft Errors. 1557-1568 - Irith Pomeranz, Sudhakar M. Reddy:
Static Test Compaction for Full-Scan Circuits Based on Combinational Test Sets and Nonscan Input Sequences and a Lower Bound on the Number of Tests. 1569-1581 - Chien-Ping Chang, Pao-Lien Lai, Jimmy J. M. Tan, Lih-Hsing Hsu:
Diagnosability of t-Connected Networks and Product Networks under the Comparison Diagnosis Model. 1582-1590 - Giuseppe Lipari, Gerardo Lamastra, Luca Abeni:
Task Synchronization in Reservation-Based Real-Time Systems. 1591-1601 - Zhijun Wang, Hao Che, Mohan Kumar, Sajal K. Das:
CoPTUA: Consistent Policy Table Update Algorithm for TCAM without Locking. 1602-1614 - Haibin Lu, Sartaj Sahni:
Enhanced Interval Trees for Dynamic IP Router-Tables. 1615-1628 - Maggie Xiaoyan Cheng, Mihaela Cardei, Jianhua Sun, Xiaochun Cheng, Lusheng Wang, Yinfeng Xu, Ding-Zhu Du:
Topology Control of Ad Hoc Wireless Networks for Energy Efficiency. 1629-1635
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.