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SBAC-PAD 2013: Porto de Galinhas, Pernambuco, Brazil
- 25th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2013, Porto de Galinhas, Pernambuco, Brazil, October 23-26, 2013. IEEE Computer Society 2013, ISBN 978-1-4799-2927-6
Session 1: Architecture
- Guohong Li, Olivier Temam, Zhenyu Liu, Dongsheng Wang, Sanchuan Guo:
Cluster Cache Monitor. 1-8 - Gong Su, Stephen Heisig:
Experiences with Disjoint Data Structures in a New Hardware Transactional Memory System. 9-16 - Sergio Paiagua, Frederico Pratas, Pedro Tomás
, Nuno Roma
HotStream: Efficient Data Streaming of Complex Patterns to Multiple Accelerating Kernels. 17-24 - Bharat Sukhwani, Mathew Thoennes, Hong Min, Parijat Dube, Bernard Brezzo, Sameh W. Asaad, Donna Dillenberger:
Large Payload Streaming Database Sort and Projection on FPGAs. 25-32
Session 2: Networks
- Yun Qu, Shijie Zhou, Viktor K. Prasanna:
Scalable Many-Field Packet Classification on Multi-core Processors. 33-40 - George Michelogiannakis
Extending Summation Precision for Network Reduction Operations. 41-48 - Pavan Poluri, Ahmed Louri:
Tackling Permanent Faults in the Network-on-Chip Router Pipeline. 49-56 - Juan Chabkinian, Thomas J. E. Schwarz:
Fast LH. 57-64
Session 3: Energy-Efficient Design
- Diego Leonel Cadette Dutra
Attaining Strictly Increasing and Precise Time Count in Energy-Efficient Computer Systems. 65-72 - Marco A. Z. Alves
Energy Efficient Last Level Caches via Last Read/Write Prediction. 73-80 - Rakesh Kumar, Alejandro Martínez, Antonio González
Dynamic Selective Devectorization for Efficient Power Gating of SIMD Units in a HW/SW Co-Designed Environment. 81-88 - Sébastien Varrette, Mateusz Guzek
HPC Performance and Energy-Efficiency of Xen, KVM and VMware Hypervisors. 89-96
Session 4: Applications I
- Gregorio Bernabé
Optimizing a 3D-FWT Code in a Heterogeneous Cluster of Multicore CPUs and Manycore GPUs. 97-104 - João V. F. Lima
Preliminary Experiments with XKaapi on Intel Xeon Phi Coprocessor. 105-112 - Alécio Pedro Delazari Binotto, Dionísio Doering, Thorsten Stetzelberger, Patrick McVittie, Sergio Zimmermann, Carlos Eduardo Pereira
A CPU, GPU, FPGA System for X-Ray Image Processing Using High-Speed Scientific Cameras. 113-119 - Zifan Liu, Nahid Emad, Soufian Ben Amor, Michel Lamure:
A Parallel IRAM Algorithm to Compute PageRank for Modeling Epidemic Spread. 120-127
Session 5: Algorithms and Scheduling
- Miguel A. Gonzalez-Mesa, Ricardo Quislant
Dealing with Reduction Operations Using Transactional Memory. 128-135 - Martin Schreiber, Christoph Riesinger, Tobias Neckel
Invasive Compute Balancing for Applications with Hybrid Parallelization. 136-143 - Nhat Minh Lê, Adrien Guatto, Albert Cohen, Antoniu Pop:
Correct and Efficient Bounded FIFO Queues. 144-151 - Paul-Antoine Arras
List Scheduling in Embedded Systems under Memory Constraints. 152-159
Session 6: GPU Applications
- Jiri Kraus, Marcello Pivanti, Sebastiano Fabio Schifano
Benchmarking GPUs with a Parallel Lattice-Boltzmann Code. 160-167 - Guilherme Andrade, Felipe Viegas
GPU-NB: A Fast CUDA-Based Implementation of Naïve Bayes. 168-175 - Daniel Carlos Guimarães Pedronette
Image Re-ranking Acceleration on GPUs. 176-183 - Jacobo Lobeiras Blanco, Margarita Amor, Ramon Doallo:
SPLG: A Tuned Signal Processing Library for GPU Architectures. 184-191
Session 7: Applications II
- Alexandre da Costa Sena, Felipe Ribeiro, Vinod E. F. Rebello, Aline de Paula Nascimento, Cristina Boeres:
Autonomic Malleability in Iterative MPI Applications. 192-199 - Karlo Gusso Lenzi
On the Performance of Code Block Segmentation for LTE-Advanced: An In-Depth Analysis. 200-205 - Luciana Arantes
Easily Rendering Token-Ring Algorithms of Distributed and Parallel Applications Fault Tolerant. 206-213 - Prateeti Mohapatra, Anshu Dubey, Christopher S. Daley
Parallel Algorithms for Using Lagrangian Markers in Immersed Boundary Method with Adaptive Mesh Refinement in FLASH. 214-220
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