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31st ISMVL 2001: Warsaw, Poland
- 31st IEEE International Symposium on Multiple-Valued Logic, ISMVL 2001, Warsaw, Poland, May 22-24, 2001, Proceedings. IEEE Computer Society 2001, ISBN 0-7695-1083-3
Invited Address
- Janusz A. Brzozowski, Zoltán Ésik, Y. Iland:
Algebras for Hazard Detection. 3-14
Circuits I
- Mostafa I. H. Abd-El-Barr, Abdullah Al-Mutawa:
A New Improved Cost-Table-Based Technique for Synthesis of 4-Valued Unary Functions Implemented Using Current-Mode CMOS Circuits. 15-20 - Tsukasa Ike, Takahiro Hanyu, Michitaka Kameyama:
Dual-Rail Multiple-Valued Current-Mode VLSI with Biasing Current Sources. 21-26 - Motoi Inaba, Koichi Tanno, Okihiko Ishizuka:
Realization of NMAX and NMIN Functions with Multi-Valued Voltage Comparators. 27-34
Design and Verification of Systems
- Mou Hu:
An Application of Multiple-Valued Logic to Test Case Generation for Software System Functional Testing. 35-40 - Mark G. Karpovsky, Radomir S. Stankovic, Claudio Moraga:
Spectral Techniques in Binary and Multiple-Valued Switching Theory. 41-48
Invited Address
- Werner Prost, Uwe Auer, Franz-Josef Tegude, Christian Pacha, Karl Goser, Rainer Duschl, K. Eberl, O. Schmidt:
Tunnelling Diode Technology. 49-60
Circuits II
- Imed Ben Dhaou, Elena Dubrova, Hannu Tenhunen:
Power Efficient Inter-Module Communication for Digit-Serial DSP Architectures in Deep-Submicron Technology. 61-66 - Sung Il Han, Young Hee Choi, Heung See Kim:
A 4-Digit CMOS Quaternary to Analog Converter with Current Switch and Neuron MOS Down Literal Circuit. 67-74
Fuzzy Logics and Their Applications I
- Anna Maria Radzikowska
, Etienne E. Kerre:
On Some Classes of Fuzzy Information Relations. 75-80 - Francesc Esteva, Lluís Godo
On Complete Residuated Many-Valued Logics with T-Norm Conjunction. 81-88
Circuits III
- Tetsuya Uemura, Toshio Baba:
A Three-Valued D-Flip-Flop and Shift Register Using Multiple-Junction Surface Tunnel Transistors. 89-93 - Takao Waho, Kazufumi Hattori, Y. Takamatsu:
Flash Analog-to-Digital Converter Using Resonant-Tunneling Multiple-Valued Circuits. 94-99 - H. Teng, R. Bolton:
The Use of Arithmetic Operators in a Self-Restored Current-Mode CMOS Multiple-Valued Logic Design Architecture. 100-108
Fuzzy Logics and Their Applications II
- Evren Gürkan, Aydan M. Erkmen, Ismet Erkmen:
Evaluation of Inconsistency in a 2-Way Fuzzy Adaptive System Using Shadowed Sets. 109-115 - Hiroaki Kikuchi:
Identification of Incompletely Specified Fuzzy Unate Logic Function. 116-124
Invited Address
- Viorica Sofronie-Stokkermans:
Representation Theorems and the Semantics of (Semi)Lattice-Based Logics. 125-136
Tutorial
- Reiner Hähnle:
Complexity of Many-Valued Logics. 137-148
Invited Address
- Zbigniew Stachniak:
Exploiting Polarity in Multiple-Valued Inference Systems. 149-158
Logic Design I
- Anas Al-Rabadi, Marek A. Perkowski:
Multiple-Valued Galois Field S/D Trees for GFSOP Minimization and Their Complexity. 159-166 - Takahiro Hanyu, Michitaka Kameyama, Katsuhiko Shimabukuro, Chotei Zukeran:
Multiple-Valued Mask-Programmable Logic Array Using One-Transistor Universal-Literal Circuits. 167-172 - Christian Lang, Bernd Steinbach:
Decomposition of Multi-Valued Functions into Min- and Max-Gates. 173-180
Automated Reasoning and Complexity I
- Matthias Baaz, Agata Ciabattoni, Christian G. Fermüller:
Cut-Elimination in a Sequents-of-Relations Calculus for Gödel Logic. 181-186 - Marsha Chechik, Steve M. Easterbrook, Benet Devereux:
Model Checking with Multi-Valued Temporal Logics. 187-192 - Dirk Van Heule, Albert Hoogewijs:
Automated Reasoning with Ordinary Assertions and Default Assumptions. 193-200
Logic Design II
- V. Cheushev, Svetlana N. Yanushkevich
Information Theory Method for Flexible Network Synthesis. 201-206 - Tsutomu Sasao:
Compact SOP Representations for Multiple-Output Functions: An Encoding Method Using Multiple-Valued Logic. 207-212 - Anna M. Tomaszewska
Two-Stage Exact Detection of Symmetrics. 213-220
Automated Reasoning and Complexity II
- Ramón Béjar
A Modular Reduction of Regular Logic to Classical Logic. 221-226 - Agata Ciabattoni
Hypersequents as a Uniform Framework for Urquhart's C, MTL and Related Logics. 227-232 - S. Selezneva:
Polynomial-Time Algorithms for Verification of Some Properties of k-Valued Functions Represented by Polynomials. 233-240
Invited Address
- Takahiro Hanyu:
Challenge of a Multiple-Valued Technology in Recent Deep-Submicron VLSI. 241-246
Computing Paradigms
- Masahiko Hiratsuka, Takafumi Aoki, Tatsuo Higuchi:
A Model of Reaction-Diffusion Cellular Automata for Massively Parallel Molecular Computing. 247-252 - Masanori Natsui, Takafumi Aoki, Tatsuo Higuchi:
Synthesis of Multiple-Valued Arithmetic Circuits Using Evolutionary Graph Generation. 253-258 - Dan A. Simovici, Szymon Jaroszewicz:
An Axiomatization of Generalized Entropy of Partitions. 259-266
MV Logics and Algebras I
- C. Morgan:
Many Valued Paraconsistent Logic. 267-272 - Jochen Pfalzgraf:
On Logical Fiberings and Decomposition of Many-Valued Operations: A Brief Survey. 273-278 - Hajime Machida, Masahiro Miyakawa, Ivo G. Rosenberg:
Relations between Clones and Full Monoids. 279-286
Tutorial
- Arnon Avron:
Classical Gentzen-Type Methods in Propositional Many-Valued Logics. 287-298
Decision Diagrams
- Frank Schmiedle, Wolfgang Günther, Rolf Drechsler:
Selection of Efficient Re-Ordering Heuristics for MDD Construction. 299-304 - Radomir S. Stankovic, Milena Stankovic, Jaakko Astola, Karen O. Egiazarian:
Bit-Level and Word-Level Polynomial Expressions for Functions in Fibonacci Interconnection Topologies. 305-310 - Radomir S. Stankovic, Milena Stankovic, Claudio Moraga:
Design of Haar Wavelet Transforms and Haar Spectral Transform Decision Diagrams for Multiple-Valued Functions. 311-318
Fuzzy Logics and Set Theories
- Petr Hájek, Zuzana Haniková:
A Set Theory within Fuzzy Logic. 319-323 - Tomoyuki Araki, Masao Mukaidono, F. Yamamoto:
On a Kleenean Extension of Fuzzy Measure. 324-329 - Helmut Thiele:
On axiomatic characterisations of fuzzy approximation operators II. The rough fuzzy set based case. 330-338
Neural Networks
- Naotake Kamiura, Yasuyuki Taniguchi, Nobuyuki Matsui:
A Functional Manipulation for Improving Tolerance against Multiple-Valued Weight Faults of Feedforward Neural Networks. 339-344 - Hisayuki Tatsumi, Yasuyuki Murai, Shinji Tokumasu:
Logics Circuit Diagnosis by Using Neural Networks. 345-350 - Q. Hua, Q.-L. Zhen:
The Designing and Training of a Fuzzy Neural Hamming Classifier. 351-360
MV Logics and Algebras II
- Stefano Aguzzoli, Daniele Mundici:
Weierstrass Approximations by Lukasiewicz Formulas with One Quantified Variable. 361-366 - Patrik Eklund, Maria A. Galán, Jesús Medina
Composing Submonads. 367-372 - Jun Ma, Jun Liu, Yang Xu:
A Method of Uncertainty Reasoning by Using Information. 373-378
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