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Hot Interconnects 2001: Stanford, CA, USA
- The Ninth Symposium on High Performance Interconnects, HOTI '01, Stanford, CA, USA, August 22-24, 2001. IEEE Computer Society 2001, ISBN 0-7695-1357-3
Packet Scheduling and Classification
- Devavrat Shah, Paolo Giaccone
, Balaji Prabhakar:
An efficient randomized algorithm for input-queued switch scheduling. 3-8 - Paolo Giaccone
An implementable parallel scheduler for input-queued switches. 9-14 - Amit Prakash, Adnan Aziz:
OC-3072 packet classification using BDDs and pipelined SRAMs. 15-20
High-Speed Interconnects
- Yoichi Koyanagi, Takeshi Horie, Takashi Miyoshi, Mitsuo Ishii:
Synfinity II-a high-speed interconnect with 2 GBytes/sec self-configurable physical link. 23-29 - Takashi Yoshikawa, Ichiro Hatakeyama, Kazunori Miyoshi, Kazuhiko Kurata, Juni-Ichi Sasaki, Nobuharu Kami, Takara Sugimoto, Muneo Fukaishi, Kazuyuki Nakamura, Kei Tanaka, Hiroaki Nishi
Optical interconnection as an IP macro of a CMOS library. 31-35 - Alan E. Charlesworth:
The Sun Fireplane SMP interconnect in the Sun Fire 3800-6800. 37-42 - Pablo Molinero-Fernández, Nick McKeown:
TCP switching: exposing circuits to IP. 43-48
Network Attached Storage and Memory
- Jørgen S. Hansen:
Flexible network attached storage using remote DMA. 51-55 - Tzi-cker Chiueh:
Stonehenge: a fault-tolerant real-time network-attached storage device. 57-61 - Hideki Osaka, Toyohiko Komatsu, Susumu Hatano, Takeshi Wada:
High-speed, high-bandwidth DRAM memory bus with crosstalk transfer logic (XTL) interface. 63-67 - Huan Liu:
Reducing routing table size using ternary-CAM. 69-73
Network Protocol Design and Evaluation
- Hrvoje Bilic, Yitzhak Birk
Deferred segmentation for wire-speed transmission of large TCP frames over standard GbE networks. 81-85 - Huseyin Simitci, Chris Malakapalli, Vamsi Gunturu:
Evaluation of SCSI over TCP/IP and SCSI over fibre channel connections. 87-91 - Florian Braun, John W. Lockwood, Marcel Waldvogel:
Layered protocol wrappers for Internet packet processing in reconfigurable hardware. 93-97 - Srikant Sharma, Kartik Gopalan
Quality of service guarantee on 802.11 networks. 99-103
Switch Design and Architecture
- Devavrat Shah, Sundar Iyer, Balaji Prabhakar, Nick McKeown:
Analysis of a statistics counter architecture. 107-111 - Shubhendu S. Mukherjee, Peter J. Bannon, Steven Lang, Aaron Spink, David Webb:
The Alpha 21364 network architecture. 113-117 - Shinji Nishimura, Tomohiro Kudoh, Hiroaki Nishi
RHiNET-3/SW: an 80-Gbit/s high-speed network switch for distributed parallel computing. 119-123 - Fabrizio Petrini, Wu-chun Feng, Adolfy Hoisie, Salvador Coll, Eitan Frachtenberg
The Quadrics network (QsNet): high-performance clustering technology. 125-130
Interconnect and Circuit Technologies
- Chunjie Duan, Anup Tirumala, Sunil P. Khatri:
Analysis and avoidance of cross-talk in on-chip buses. 133-138 - Henning Braunisch, Raj Nair:
On the techniques of clock extraction and oversampling. 139-143 - Fabio M. Chiussi, Alberto Brizio, Andrea Francini, Kevin Grant, Khurram Kazi, Denis A. Khotimsky, Santosh Krishnan, Sheng Shen, Mohammad Syed, Thomas Wasilewski:
A family of ASIC devices for next generation distributed packet switches with QoS support for IP and ATM. 145-149 - Norival R. Figueira, Paul Bottorff, Huiwen Li:
New World Campus networking. 151-155
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