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8. Haifa Verification Conference 2012: Haifa, Israel
- Armin Biere, Amir Nahir, Tanja E. J. Vos:
Hardware and Software: Verification and Testing - 8th International Haifa Verification Conference, HVC 2012, Haifa, Israel, November 6-8, 2012. Revised Selected Papers. Lecture Notes in Computer Science 7857, Springer 2013, ISBN 978-3-642-39610-6 - David Harel:
On Behavioral Programming. 1 - Edward A. Lee:
Verifying Real-Time Software Is Not Reasonable (Today) - Abstract of Invited Talk. 2 - Nikolaj S. Bjørner:
SMT in Verification, Modeling, and Testing at Microsoft. 3 - Orna Raz:
Reducing Costs While Increasing Quality. 4 - Alex Goryachev:
Special Session on Security Verification. 5 - Ryan Kastner:
Circuit Primitives for Monitoring Information Flow and Enabling Redundancy. 6 - Jamil Mazzawi, Ziyad Hanna:
Formal Analysis of Security Data Paths in RTL Design. 7 - Ricardo J. Dias, Vasco Pessanha, João Lourenço
:
Precise Detection of Atomicity Violations. 8-23 - Dima Elenbogen, Shmuel Katz, Ofer Strichman
Proving Mutual Termination of Programs. 24-39 - Saddek Bensalem, Marius Bozga, Doron A. Peled, Jean Quilbeuf:
Knowledge Based Transactional Behavior. 40-55 - Robert Könighofer, Roderick Bloem:
Repair with On-The-Fly Program Analysis. 56-71 - Hana Chockler, Alexander Ivrii, Arie Matsliah:
Computing Interpolants without Proofs. 72-85 - António Morgado, Mark H. Liffiton, João Marques-Silva:
MaxSAT-Based MCS Enumeration. 86-101 - Norbert Manthey, Marijn Heule
Automated Reencoding of Boolean Formulas. 102-117 - John Paul, Elena Guralnik, Anatoly Koyfman, Amir Nahir, Subrat Panda:
Leveraging Accelerated Simulation for Floating-Point Regression. 118-131 - Charlie Shucheng Zhu, Georg Weissenbacher, Sharad Malik:
Coverage-Based Trace Signal Selection for Fault Localisation in Post-silicon Validation. 132-147 - Yoav Katz, Michal Rimon, Avi Ziv:
A Novel Approach for Implementing Microarchitectural Verification Plans in Processor Designs. 148-161 - Young Joo Kim, Moonzoo Kim, Tai-Hyo Kim:
Statistical Model Checking for Safety Critical Hybrid Systems: An Empirical Evaluation. 162-177 - Allon Adir, Alex Goryachev, Lev Greenberg, Tamer Salman, Gil Shurek:
A New Test-Generation Methodology for System-Level Verification of Production Processes. 178-192 - Faron Moller
Defining and Model Checking Abstractions of Complex Railway Models Using CSP||B. 193-208 - Vijay Ganesh
Word Equations with Length Constraints: What's Decidable? 209-226 - Orna Kupferman, Sigal Weiner:
Environment-Friendly Safety. 227-242 - Kristin Yvonne Rozier, Moshe Y. Vardi:
Deterministic Compilation of Temporal Safety Properties in Explicit State Model Checking. 243-259 - Roderick Bloem, Rolf Drechsler, Görschwin Fey, Alexander Finder, Georg Hofferek, Robert Könighofer, Jaan Raik, Urmas Repinski, André Sülflow:
FoREnSiC- An Automatic Debugging Environment for C Programs. 260-265 - Marcela Simková, Ondrej Lengál
Towards Beneficial Hardware Acceleration in HAVEN: Evaluation of Testbed Architectures. 266-273 - Phillip James, Arnold Beckmann, Markus Roggenbach
Using Domain Specific Languages to Support Verification in the Railway Domain. 274-275 - Guillermo Rodríguez-Navas, Patrick J. Graydon, Iain Bate:
From Fault Injection to Mutant Injection: The Next Step for Safety Analysis? 276-277 - Magdalena Widl:
Test Case Generation by Grammar-Based Fuzzing for Model-Driven Engineering. 278-279
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