default search action
CF 2024: Ischia, Italy
- Proceedings of the 21st ACM International Conference on Computing Frontiers, Workshops and Special Sessions, CF 2024, Ischia, Italy, May 7-9, 2024. ACM 2024
Compiler Frontiers
- Xiang Huang
, Andrei N. Migunov
A General Purpose Analog Computer to Population Protocol Compiler. - Dorra Ben Khalifa
Compile-Time Optimization of the Energy Consumption of Numerical Computations. - Gokcen Kestor
Effective HPC Programming via Domain-Specific Abstractions and Compilation. - Fabrizio Ferrandi
High-level synthesis for complex applications: the Bambu approach.
Malicious Software and Hardware in Internet of Things
- Jo Vliegen
HAGAR: Hashgraph-based Aggregated Communication and Remote Attestation. - Mario Barbareschi
On the adoption of PUF for key agreement scheme in Internet of Things. - Tishya Sarma Sarkar
X-Factor: Deep Learning-based PCB Counterfeit Detection using X-Ray CT Techniques for Hardware Assurance. - Rim Zahmoul
Relaxed Threshold Implementations.
WORKSHOP SESSION: Open-Source Hardware Workshop
- Côme Allart
Using a Performance Model to Implement a Superscalar CVA6. - Michele Caon
Seeing Beyond the Order: a LEN5 to Sharpen Edge Microprocessors with Dynamic Scheduling. - Mohamed Amine Hamdi
Integrating SystemC-AMS Power Modeling with a RISC-V ISS for Virtual Prototyping of Battery-operated Embedded Devices. - Chaoqun Liang
A Gigabit, DMA-enhanced Open-Source Ethernet Controller for Mixed-Criticality Systems. - Alessandra Dolmeta
Implementation and integration of NTT/INTT accelerator on RISC-V for CRYSTALS-Kyber. - Antonio Porsia
Model theft attack against a tinyML application running on an Ultra-Low-Power Open-Source SoC. - Nicolò Carpentieri
Performance evaluation of acceleration of convolutional layers on OpenEdgeCGRA. - Leo Moser
Stitching FPGA Fabrics with FABulous and OpenLane 2. - Philipp van Kempen
muRISCV-NN: Challenging Zve32x Autovectorization with TinyML Inference Library for RISC-V Vector Extension. - Simone Manoni
NARS: Neuromorphic Acceleration through Register-Streaming Extensions on RISC-V Cores. - Daniel Vázquez
Open-Source Elastic CGRA Generator.
Collaborative Projects
- John D. Leidel
Scaling SST for Extreme Scale System Simulation. - Daniel Araújo de Medeiros, Eric B. Gregory
IO-SEA: Storage I/O and Data Management for Exascale Architectures. - Francesca Palumbo
MYRTUS: Multi-layer 360° dYnamic orchestration and interopeRable design environmenT for compute-continUum Systems. - Gianluca Palermo
LIGATE - LIgand Generator and portable drug discovery platform AT Exascale.
Computer Architecture in Space
- Eleonora Vacca
REMPRO: Reconfigurable Modular Processor. - Eleonora Vacca
Assessment of RISC-V Processor Suitability for Satellite Applications. - James H. Buckley
The Advanced Particle-astrophysics Telescope (APT): Computation in Space. - Michele Fiorito
A DNN-based Background Segmentation Accelerator for FPGA-equipped satellites.
Quantum Computing
- Anastasiia Butko
HamPerf: A Hamiltonian-Oriented Approach to Quantum Benchmarking. - Martin Schulz
From the Physics Lab to the Computer Lab: Towards Flexible and Comprehensive DevOps for Quantum Computing. - Nobuyasu Ito
Quantum computer simulation on HPC.
Semiconductor Manufacturing Initiatives
- James A. Ang
Democratization of Computing Innovation via a CHIPS-enabled Renaissance in Co-design. - Martin Schulz
The European Chips Act and its Impact on Teaching.
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-11-22 19:30 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: