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22nd MIXDES 2015: Torun, Poland
- 22nd International Conference Mixed Design of Integrated Circuits & Systems, MIXDES 2015, Torun, Poland, June 25-27, 2015. IEEE 2015, ISBN 978-8-3635-7807-7
- Christophe Lallement
, Morgan Madec
Challenges in design-oriented modeling in biology. 17-22 - Amara Amara, Navneet Gupta, Khaja Ahmad Shaik, Costin Anghel, Kiyoo Itoh:
Energy efficiency optimization for digital applications in 28nm UTBB FDSOI technology. 23 - Tomasz Szmuc, Marcin Szpyrka:
Formal methods - Support or scientific decoration in software development? 24-31 - Massimo Caccia:
Silicon PhotoMultipliers: Introducing the digital age in low light detection. 32 - Marek Turowski, Klas Lilja:
Single-event effects in advanced CMOS technologies - Analysis and mitigation. 33 - Krzysztof Siwiec
A CMOS system-on-chip for physiological parameters acquisition, processing and monitoring. 37-42 - Andrzej Michnik
The BioSip system - Hardware solutions. 43-47 - Pawel Badura
Inertial sensor location analysis in automatic balance assessment. 48-52 - Krzysztof Rózanowski
First approach for design of an autonomous measurement system to aid determination of the psychological profile of soldiers. 53-57 - Bartlomiej Kubik, Zbigniew Szczurek, Pawel Kowalski, Andrzej Michnik
Organization of fast biomedical data transmission in a low-power, high-reliability wireless personal area network (WPAN) dedicated to data acquisition from BioSip modules. 58-62 - Paula Lubina, Marcin Rudzki
Artificial neural networks in accelerometer-based human activity recognition. 63-68 - Michal Walus, Krzysztof Bernacki
NIR finger vascular system imaging in angiology applications. 69-73 - Tadeusz Sondej
Implementation of an algorithm for heart rate measurement in a specialized multi-core processor. 74-78 - Wojciech Wieclawek:
Automatic cysts detection in optical coherence tomography images. 79-82 - Adam Pawlak, Krzysztof Horoba
Telemonitoring of pregnant women at home - Biosignals acquisition and measurement. 83-87 - Piotr Zarychta
Feature vectors of the cruciate ligaments of the knee joint. 88-92 - Wojciech Sankowski
Multimodal biometric database DMCSv1 of 3D face and hand scans. 93-97 - Jacek Kawa
Computer aided diagnosis workstation for brain tumor assessment. 98-103 - Michal Bernat, Zbigniew Piotrowski
Software tool for the analysis of components characteristic for ECG signal. 104-109 - Adam Tarnowski
Possibilities and limitations of automated psychological profiling. 110-114 - Barbara Szuster, Zbigniew Szczurek, Bartlomiej Kubik, Pawel Kowalski, Andrzej Michnik
Wireless medical systems for recording biomedical parameters developed at ITAM in light of global achievements in the field and anticipated development trends. 115-120 - Bartosz Sakowicz
Methods of 3D images quality assesment. 123-128 - Krzysztof Fornalczyk, Piotr Napieralski
Stereoscopic image perception quality factors. 129-133 - Piotr Perek
Towards automatic calibration of stereoscopic video systems. 134-137 - Aleksander Mielczarek, Piotr Perek
Calibration of stereoscopic camera rigs using dedicated real-time SDI video processor. 138-140 - Dariusz Makowski
Application of PCI express interface in high-performance video systems. 141-143 - Pawel Plewinski, Dariusz Makowski
Remote control of 3D camera rig with embedded system. 144-147 - Michal Wlodarczyk, Maciej Borzecki, Tomasz Pluciennik, Artur Skwarna, Marek Swiecznik, Jadwiga Sierocinska, Bartlomiej Jozwiak:
Mobile application for remote control of stereoscopic images acquisition system. 148-152 - Rolando Ingles, Piotr Perek
A simple multithreaded C++ framework for high-performance data acquisition systems. 153-157 - Bernd Landgraf:
Challenges for analog circuits in sub-100 nm CMOS nodes. 161-164 - Abir Rezgui, Morgan Madec
Integration of SBML models for the description of biological system in a lab-on-chip. 165-170 - Elise Rosati, Morgan Madec
Verilog-A compact space-dependent model for biology. 171-176 - Mike Schwarz, Jochen Franz, Mathias Reimann:
The future is MEMS design considerations of microelectromechanical systems at Bosch. 177-180 - Wladek Grabinski
FOSS EKV 2.6 parameter extractor. 181-186 - Maria-Alexandra Paun:
On the modelisation of the main characteristics of SOI Hall cells by three-dimensional physical simulations. 187-191 - Mike Brinson, Vadim Kuznetsov
Qucs equation-defined and Verilog-A RF device models for harmonic balance circuit simulation. 192-197 - Daniel Tomaszewski
Qucs-based development of an energy harvester compact model. 198-203 - Francesc N. Masana:
Lung/airway dynamic model using ABM elements and PSPICE. 204-209 - Atieh Farokhnejad
Wavelet-based calculation of the transmission coefficient for tunneling events in Tunnel-FETs. 210-215 - Dominik Kasprowicz
Channel charge model of a dual-gate junctionless transistor. 216-221 - Daniel Tomaszewski
Simple methods of threshold voltage parameter extraction for MOSFET models. 222-226 - Abolfazl Zokaei, Amir Amirabadi
A 130 nm wideband fully differential linear low noise amplifier. 229-233 - Mehdi Ghasemzadeh, Arefeh Soltani, Amin Akbari, Khayrollah Hadidi:
A 6-bit 800MS/s flash ADC in 0.35μm CMOS. 234-238 - Anouar Laifi, M. Adib Al Abaji, Roland Thewes:
A 96 dB SNDR current-mode continuous-time ΔΣ modulator for electrochemical sensor arrays. 239-242 - Dominik Sondej
A comparison of methods for time-to-digital conversion based on independent coding lines and multi-edge coding. 243-247 - Andreas Dixius, Dennis Walter, Sebastian Höppner, Holger Eisenreich, René Schüffny:
A deep-submicron CMOS flow for general-purpose timing-detection insertion. 248-253 - Mohammad Masoumi, Gabriel Bertotti, Stefan Keil, Roland Thewes:
A high spatial resolution 64-channel in-vivo neural recording system. 254-257 - Maximilian Hofer, Christoph Böhm, Robert Kolm, Albert Missoni:
A hybrid voltage reference. 258-261 - Mehdi Ghasemzadeh, Amin Akbari, Arefeh Soltani, Khayrollah Hadidi:
A new ultra high speed 7-2 compressor with a new structure. 262-265 - Marta Kolasa
An advanced software model for optimization of self-organizing neural networks oriented on implementation in hardware. 266-271 - Nico Hellwege, Nils Heidmann, Marco Erstling, Dagmar Peters-Drolshagen, Steffen Paul
An aging-aware transistor sizing tool regarding BTI and HCD degradation modes. 272-277 - Mehdi Ghasemzadeh, Amin Akbari, Khayrollah Hadidi:
An ultra high speed booth encoder structure for fast arithmetic operations. 278-281 - Tomasz Talaska
Analog sorting circuit for the application in self-organizing neural networks based on neural gas learning algorithm. 282-286 - Andrei Hera, Oana Boncalo, Constantina-Elena Gavriliu, Alexandru Amaricai, Valentin Savin
Analysis and implementation of on-the-fly stopping criteria for layered QC LDPC decoders. 287-291 - Rafal Kleczek
Charge sensitive amplifier for nanoseconds pulse processing time in CMOS 40 nm technology. 292-296 - Zbigniew Jaworski
Choosing the optimal HDL model of thermometer-to-binary encoder. 297-300 - Mykhaylo Melnyk
Custom method for automation of microbolometer design and simulation. 301-304 - Piotr Kmon
Design for the testability of the multichannel neural recording and stimulating integrated circuit. 305-308 - Radoslaw Piesiewicz:
Design of building blocks of an X-band silicon integrated transceiver for FMCW radar. 309-313 - Piotr Kmon
Design of the ultra low power, low area occupied amplifier for recording biomedical signals in the single Hz bandwidth. 314-317 - Marika Kuczynska, Szymon Bugiel
Development of low-power high speed (10Gb/s) drivers in CMOS 130 nm technology. 318-323 - Marika Kuczynska, Sabina Gozdur, Szymon Bugiel
Development of radiation-hard bandgap reference and temperature sensor in CMOS 130 nm technology. 324-329 - Mehdi Ghasemzadeh, Arefeh Soltani, Amin Akbari, Khayrollah Hadidi:
Fast and accurate fractional frequency synthesizer in 0.18μm technology. 330-333 - Mariusz Derlecki, Tomasz Borejko, Witold A. Pleskacz:
IF polyphase filter design and calibration with back-gate biasing in 28 nm FD-SOI technology. 334-338 - Tihomir Brusev, Ivan Uzunov, Georgi Kunov, Elissaveta Gadjeva:
Investigation of parallel hybrid CMOS envelope amplifier designed on AMS 0.35 μm process. 339-342 - Joakim Nilsson, Johan Borg
Leakage current compensation for a 450 nW, high-temperature, bandgap temperature sensor. 343-347 - Rafal Dlugosz, Gunter Fischer:
Low chip area, low power dissipation, programmable, current mode, 10-bits, SAR ADC implemented in the CMOS 130nm technology. 348-353 - Aleh Halauko, Tomasz Borejko, Witold A. Pleskacz:
Low voltage LNA implementations in 28 nm FD-SOI technology for GNSS applications. 354-358 - Konrad R. Skup, Piotr Orleanski
Mixed signal ASIC controller for satellite medium power DC/DC converters. 359-363 - Zbigniew Jaworski
Optimization of capacitive divider for 8-bit DAC realized in 65 nm CMOS process. 364-369 - Daniel Arbet
Readout interface for capacitive MEMS microphone in CMOS technology. 370-374 - Krzysztof Podlaski
Reversible circuit synthesis with particle swarm optimization using crossover operator. 375-379 - Mariusz Rawski
Reversible logic synthesis of boolean functions using functional decomposition. 380-385 - Bernhard Raab, Manuel Kaufmann, Andreas Rauchenecker, Timm Ostermann:
Robust and efficient design plan for integrated differential negative-Gm LC VCOs. 386-389 - Krzysztof Kasinski
Test system of the time-over-threshold based chip optimized for linear transfer characteristics and low power for particle tracking applications. 390-395 - Cezary Kolacinski
The complete readout system for THz spectroscopy. 396-401 - Lukasz Matoga, Arkadiusz Koczor, Michal Golek, Pawel Zadek, Piotr Penkala:
Modular FPGA-based hardware platform for emulation. 402-408 - Filipe Araújo, Miguel D. Fernandes, João Pinto, Luís Bica Oliveira, João Pedro Oliveira:
Wideband CMOS RF front-end receiver with integrated filtering. 409-414 - Krzysztof Górecki
Application of the electrothermal average inductor model for analyses of boost converters. 417-421 - Andrzej Czerwoniec, Tomasz Torzewicz, Agnieszka Samson, Marcin Janicki
Estimation of heat transfer coefficient temperature dependence from cooling curve measurements. 422-425 - Piotr Zajac
Investigation of localized thermal vias for temperature reduction in 3D multicore processors. 426-430 - Krzysztof Górecki
Modelling power LEDs with thermal phenomena taken into account. 431-435 - Tomasz Raszkowski, Mariusz Zubert
Numerical solution of 1-D DPL heat transfer equation. 436-439 - Gergely Simon
Stability criteria of the thermal characterization of discrete components. 440-445 - Piotr Kocanda, Andrzej Kos:
Static and dynamic energy losses vs. temperature in different CMOS technologies. 446-449 - Christian Widemann, Harry Weber, Souren Schatz, Wolfgang Mathis
A comparison of the Volterra series-based nonlinear S-parameters and X-parameters. 453-457 - Jacek Nazdrowicz, Michal Szermer
A study on microbolometer electro-thermal circuit modelling. 458-463 - João P. Alarcão, Luís B. Oliveira, João Pedro Oliveira, Rui Santos-Tavares:
Analysis of a noise canceling LNA using a Si2 OpenAccess based tool - CADIT. 464-469 - Michal Staniewski, Andrzej Pfitzner:
Compact DC model of a JVeSFET transistor with reduced number of empirical parameters. 470-475 - Elissaveta Gadjeva, Marin Hristov
Generalized SPICE model of photovoltaic modules. 476-480 - Maciej Frankiewicz, Marek Jableka, Krzysztof Boron, Patryk Urban, Janusz Guzdzik, Andrzej Ryszko, George Jiang:
Method for 315/433 MHz Remote Keyless Entry sensitivity and range statistical analysis for automotive applications. 481-485 - Camillo Stefanucci, Pietro Buccella, Maher Kayal, Jean-Michel Sallese:
Modeling parasitic vertical PNP in HVCMOS. 486-489 - Krzysztof Kasinski
Noise optimization of the time and energy measuring ASIC for silicon tracking system. 490-495 - Kairang Chen, Quoc-Tai Duong, Atila Alvandpour:
Power analysis for two-stage high resolution pipeline SAR ADC. 496-499 - Pietro Buccella, Camillo Stefanucci, Jean-Michel Sallese, Maher Kayal:
Spice simulation of passive protection in smart power ICs. 500-503 - Andrzej Borys:
Strange history of an operator o. 504-507 - Denis Sallin, Nisrina Abdo, Adil Koukab, Magali Estribeau, Pierre Magnan, Maher Kayal:
Silicon-on-insulator technology for bioluminescence imaging and application to a switching photodetector. 511-514 - Sheilla A. Odhiambo, Carla Hertleer, Lieva Van Langenhove
Use of electric energy stored in a textile-based PEDOT: PSS capacitor. 515-517 - Tomasz Golonek
Analog testing stimulus optimization for generating by means of Sigma-Delta modulation. 521-524 - Evgenia Voulgari, Matthew Noy, Francis Anghinolfi, François Krummenacher, Maher Kayal:
Design and measurement methodology for a sub-picoampere current digitiser. 525-529 - Aleksandra Krzyzanowska
Methodology of automation process of wafer tests. 530-533 - Lukasz Wojdowski:
Probabilistic reasoning in practical system analysis. 534-539 - João L. A. de Melo, Pedro V. Leitão, João Goes
A simple class-D audio power amplifier using a passive CT ΣΔ modulator for medium quality sound systems. 543-546 - Sylvain Noblecourt, Frederic Morancho, Karine Isoird
An improved junction termination design using deep trenches for superjunction power devices. 547-551 - Witold Maranda
Capacity degradation of lead-acid batteries under variable-depth cycling operation in photovoltaic system. 552-555 - Jacek Jasielski
Hybrid LBDD PWM modulator for digital class-BD audio amplifier based on STM32F407VGT6 microcontroller and analog DLL. 556-561 - Tomasz Rudnicki
Performance analysis of a PMSM drive with torque and speed control. 562-566 - Rupendra Kumar Sharma
Simulation and characterization of ion irradiated 4H-SiC JBS diode. 567-570 - Pawel Górecki
Voltage regulators for the laptop's power supply station with photovoltaic modules. 571-575 - Rafal Kapela
Asphalt surfaced pavement cracks detection based on histograms of oriented gradients. 579-584 - Ryszard Wojtyna:
Differential-pair-based current-mode analog signal processing. 585-588 - Krzysztof Wawryn, Pawel Poczekajlo
FPGA implementation of 3-D separable Gauss filter using pipeline rotation structures. 589-594 - Jerzy Fiolka:
Fractional fourier transform and its application to engine knock detection. 595-598 - Jacek Nazdrowicz:
A relational database environment for numerical simulation backend storage. 601-606 - Pawel Dabal
An efficient post-processing method for pipelined pseudo-random number generator in SoC-FPGA. 607-611 - Rafal Kotas
Control and monitoring system prototype for pulse plasma sintering process. 612-617 - Damian Kacperski, Michal Wlodarczyk, Kamil Grabowski
Custom design of galvanometric motor for large mirror. 618-623 - Michal Grobelny
Logic controller design system supporting UML activity diagrams. 624-627 - Lukasz Dykcik, Damian Kacperski, Przemyslaw Sekalski
Mirror galvanometer-based laser projector. 628-631 - Dariusz Obrebski, Michal Zbiec:
The monitoring network for novel building envelopes. 632-635
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