EL4089C

EL4089C
DC Restored Video Amplifier

Features General Description

# Complete video level restoration The EL4089C is an 8-pin complete DC-restored monolithic vid-
system eo amplifier sub-system. It contains a high quality video ampli-
# 0.02% differential gain and 0.05§ fier and a nulling, sample-and-hold amplifier specifically de-
differential phase accuracy at signed to stabilize video performance.
NTSC
When the HOLD logic input is set to a TTL/CMOS logic 0, the
# 60 MHz bandwidth
sample- and-hold amplifier can be used to null the DC offset of
# 0.1 dB flatness to 10 MHz the video amplifer.
# VS e g 5V to g 15V
# TTL/CMOS hold signal When the HOLD input goes to a TTL/CMOS logic l, the cor-
recting voltage is stored on the video amplifier’s input coupling
Applications capacitor. The correction voltage can be further corrected as
need be, on each video line.
# Input amplifier in video
equipment
The video amplifier is optimized for video performance and low
# Restoration amplifier in video power. Its current feedback design allows the user to maintain
mixers essentially the same bandwidth over a gain range of nearly 10:1.
The amplifier drives back-terminated 75X lines.
Ordering Information
Part No. Temp. Range Package OutlineÝ The EL4089C is fabricated in Elantec’s proprietary Comple-
EL4089CN 0§ C to a 75§ C 8-Pin P-DIP MDP0031
mentary Bipolar process which produces NPN and PNP tran-
EL4089CS 0§ C to a 75§ C 8-Lead SO MDP0027
sistors with equivalent AC and DC performance. The EL4089C
is specified for operation over 0§ C to a 75§ C temperature range.

Connection Diagram

January 1996 Rev B

4089 – 1

DC restoring amplifier with a gain of 2, restoring to ground.

Note: All information contained in this data sheet has been carefully checked and is believed to be accurate as of the date of publication; however, this data sheet cannot be a ‘‘controlled document’’. Current revisions, if any, to these
specifications are maintained at the factory and are available upon your request. We recommend checking the revision level before finalization of your design documentation.

© 1993 Elantec, Inc.

 EL4089C
DC Restored Video Amplifier

Absolute Maximum Ratings (TA e 25§ C)

Voltage between V a and Vb 33V Operating Ambient
Voltage between VIN a , S/HIN a , (V a ) a 0.5V Temperature Range 0§ C to a 75§ C
and GND pins to (Vb) b0.5V Operating Junction Temperature
VOUT Current 60 mA Plastic DIP or SOL 150§ C
Current into VINb and HOLD Pins 5 mA Storage Temperature Range b 65§ C to a 150§ C
Internal Power Dissipation See Curves
Important Note:
All parameters having Min/Max specifications are guaranteed. The Test Level column indicates the specific device testing actually
performed during production and Quality inspection. Elantec performs most electrical tests using modern high-speed automatic test
equipment, specifically the LTX77 Series system. Unless otherwise noted, all tests are pulsed tests, therefore TJ e TC e TA.

Test Level Test Procedure

I 100% production tested and QA sample tested per QA test plan QCX0002.
II 100% production tested at TA e 25§ C and QA sample tested at TA e 25§ C ,
TMAX and TMIN per QA test plan QCX0002.
III QA sample tested per QA test plan QCX0002.
IV Parameter is guaranteed (but not tested) by Design and Characterization Data.
V Parameter is typical value at TA e 25§ C for information purposes only.

Open Loop DC Electrical Characteristics

Provisional Supplies at g 15V, Load e 1 kX; TA e a 25§ C
Test
Parameter Description Temp Min Typ Max Units
Level
Amplifier Section (HOLD e 5V)
VOS Input Offset Voltage a 25§ C 12 25 II mV
Ib a IN a Input Bias Current a 25§ C 1 5 II mA
Ibb INb Input Bias Current a 25§ C 18 150 II mA
ROL Transimpedance (Note 1) a 25§ C 180 800 II kX
RINb INb Resistance a 25§ C 20 V X
CMRR Common Mode Rejection Ratio
a 25§ C 44 60 II dB
(Note 2)
VO Output Voltage Swing a 25§ C g 12 g 13 II V
ISC Short Circuit Current
a 25§ C 45 100 II mA
(IN a Only Driven to 0.5V)
Restore Section
VOS, Comp Composite Input Offset Voltage
a 25§ C 3 7 II mV
(Note 3)
Ib a ,r Restore In a Input Bias Current a 25§ C 3 12 II mA

TD is 3.5in
IOUT Restoring Current Available a 25§ C 180 300 II mA
CMRR Common Mode Rejection Ratio
a 25§ C 60 70 II dB
(Note 2)

2
 TD is 3.2in
EL4089C
DC Restored Video Amplifier

Open Loop DC Electrical Characteristics Ð Contd.

Provisional Supplies at g 15V, Load e 1 kX; TA e a 25§ C
Test
Parameter Description Temp Min Typ Max Units
Level
Restore Section ÐContd.
PSRR Power Supply Rejection Ratio (Note 4) a 25§ C 60 90 II dB
VTHRESHOLD HOLD Logic Threshold a 25§ C 0.8 2.0 II V
IIH, Hold HOLD Input Current @ Logic High a 25§ C 1 5 II mA
IIL, Hold HOLD Input Current @ Logic Low a 25§ C 5 15 II mA
Supply Current
Isy, Hold Supply Current (HOLD e 5V) a 25§ C 4.8 6.0 9.0 II mA
Isy, Sampling Supply Current (HOLD e 0V) a 25§ C 5.0 6.5 11.0 II mA

Closed Loop AC Electrical Characteristics

Provisional Supplies at g 15V, Load e 150X and 15 pF. Rf and Rg e 300X; AV e 2, TA e 25§ C. (See Note 7 about Test Fixture)
Test
Parameter Description Min Typ Max Units
Level
Amplifier Section
SR Slew Rate (Note 5) 500 V V/ms
SR Slew Rate with g 5V Supplies
275 V V/ms
(Note 5)
BW Bandwidth b 3 dB 60 V MHz
g 5V Supplies b 3 dB 55 V MHz
BW Bandwidth g 0.1 dB 25 V MHz
g 5V Supplies g 0.1 dB 23 V MHz
dG Differential Gain VS e g 15V 0.02 V %
at 3.58 MHz (Note 6) VS e g 5V 0.03 V %
dPh Differential Phase VS e g 15V 0.05 V §
at 3.58 MHz (Note 6) VS e g 5V 0.06 V §
Restore Section
SR Restore Amplifier Slew Rate
25 V V/ms
(Test Circuit) 20%–80%

TD is 3.2in
THE Time to Enable Hold 25 V ns
THD Time to Disable Hold 40 V ns
Note 1: For current feedback amplifiers, AVOL e ROL/RINb.
Note 2: VCM e g 10V for VS e g 15V.
Note 3: Measured from S/H Input to amplifier output, while restoring.
Note 4: VOS is measured at VS e g 4.5V and VS e g 16V, both supplies are changed simultaneously.
Note 5: SR measured at 20% to 80% of a 4V pk-pk square wave.
Note 6: DC offset from b0.714V through a 0.714V, ac amplitude is 286 mVp-p, equivalent to 40 ire.
Note 7: Test fixture was designed to minimize capacitance at the IN b input. A ‘‘good’’ fixture should have less than 2 pF of stray
capacitance to ground at this very sensitive pin. See application notes for further details.

3
EL4089C
DC Restored Video Amplifier

Typical Performance Curves

Supply Current vs Temperature Supply Current
VS e g 15V vs Supply Voltage

4089 – 2 4089 – 3

Restoring Current Amplifier Input Current

vs Temperature vs Die Temperature

4089 – 4
4089 – 5

Amplifier Output Voltage

vs Die Temperature; Amplifier Offset Voltage
VS e g 15V vs Die Temperature

4089 – 6 4089 – 7

4
 EL4089C
DC Restored Video Amplifier

Typical Performance Curves Ð Contd.

CMRR for Amplifier and
Restore Section Transimpedance (ROL)
vs Die Temperature vs Die Temperature

4089 – 8 4089 – 9

Relative Frequency Response Frequency Response vs Supply

for Various Gains, RF e 300X AV e 2; RF e 300

4089 – 10 4089 – 11

Frequency Response Flatness for Various

Frequency Response Flatness vs Supply Load and Supply Conditions
AV e 2; RF e 300 AV e 2; RF e 300

4089 – 12 4089 – 13

5
 EL4089C
DC Restored Video Amplifier

Typical Performance Curves Ð Contd.

Differential Gain vs DC Input
Frequency Response Flatness Offset; AV e 2, FO e 3.58 MHz,
vs CIN b ; AV e 2; RF e 300 RL e 150X

4089 – 14
4089 – 15

Differential Phase vs DC Input

Offset; AV e 2; FO e 3.58 MHz;
RL e 150X

4089 – 16
8-Pin Plastic DIP 8-Lead SO
Maximum Power Dissipation Maximum Power Dissipation
vs Ambient Temperature vs Ambient Temperature

4089 – 17 4089 – 18

6
 EL4089C
DC Restored Video Amplifier

Typical Application The RX1 resistor is in the circuit purely to simu-

late some external source impedance, and is not
The EL4089 can be used to DC-restore a video
needed as a real component. Likewise for RX2.
waveform (see Fig. 1). The above circuit forces
The 75X back terminating resistor RXT is rec-
the cable driving video amplifier’s output to
ommended when driving 75X cables.
ground when the HOLD pin is at a logic low.
The board layout should have a ground plane un-
The ‘‘correction voltage’’ is stored on capacitor
derneath the EL4089, with the ground plane cut
CX1, an external ceramic capacitor. The capaci-
away from the vicinity of the VIN b pin, (pin 1).
tor value is chosen from the system require-
This helps to minimize the stray capacitance on
ments. The typical input bias current to the vid-
pin 1.
eo amplifier is 1 mA, so for a 62 ms hold time, and
a 0.01 mF capacitor, the output voltage drift is
Power supply bypassing is important, and a
6.2 mV in one line.
0.1 mF ceramic capacitor, from each power pin to
ground, placed very close to the power pins, to-
The S/H amplifier can provide a typical current
gether with a 4.7 mF tantalum bead capacitor, is
of 300 mA to charge capacitor CX1, so with a
recommended.
1.2 ms sampling time, the output can be corrected
by 36 mV in each line.
When both digital and Analog grounds are on the
same board, the EL4089 should be on the Analog
Using a smaller value of CX1 increases both the
ground. The digital ground can be connected to
voltage that can be corrected, and the drift while
the Analog ground through a 100X –300X resis-
being held, likewise, using a larger value of CX1,
tor, near the EL4089. This allows the digital sig-
reduces the voltages.
nal a return path, while preventing the digital
noise from corrupting the analog ground.

4089 – 19

Figure 1

7
EL4089C EL4089C
DC Restored Video Amplifier

Table of Charge Storage Capacitor vs Droop Charging Rates

Cap Value Droop in 60 ms Charge in 1.2 ms Charge in 4 ms

nF mV mV mV
10 6 36 120
33 1.8 11 36
100 0.6 3.6 12
Basic formulae are:
V (droop) e Ib a * (Line time b Sample time) / Capacitor
and V (charge) e IOUT * Sample time / Capacitor

For best results the source impedance should be pled during active video. Typically the sample is
kept low, using a buffer for example. made during the back porch period of horizontal
blanking. For this reason color composite signals,
Because the S/H effectively shorts the input sig- which have color burst on the back porch, can
nal during Sample, the input should not be sam- not be passed. See EL2090 or EL4093 for this ap-
plication.

General Disclaimer
Specifications contained in this data sheet are in effect as of the publication date shown. Elantec, Inc. reserves the right to make changes
in the circuitry or specifications contained herein at any time without notice. Elantec, Inc. assumes no responsibility for the use of any
circuits described herein and makes no representations that they are free from patent infringement.

WARNING Ð Life Support Policy

Elantec, Inc. products are not authorized for and should not be
used within Life Support Systems without the specific written
January 1996 Rev B

consent of Elantec, Inc. Life Support systems are equipment in-

Elantec, Inc. tended to support or sustain life and whose failure to perform
when properly used in accordance with instructions provided can
1996 Tarob Court be reasonably expected to result in significant personal injury or
Milpitas, CA 95035 death. Users contemplating application of Elantec, Inc. products
in Life Support Systems are requested to contact Elantec, Inc.
Telephone: (408) 945-1323 factory headquarters to establish suitable terms & conditions for
(800) 333-6314 these applications. Elantec, Inc.’s warranty is limited to replace-
Fax: (408) 945-9305 ment of defective components and does not cover injury to per-
sons or property or other consequential damages.
European Office: 44-71-482-4596

8 Printed in U.S.A.