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Stephen Bates, Global Engineering Head, Sr. Technical Director, Microsemi
Stephen Bates is a Senior Technical Director within the Performance Solutions Business Unit at Microsemi. He works extensively on storage architectures and non-volatile memory. He has been involved in the architecture and development of both RAID-based systems and flash controllers. He has intimate knowledge of the most common networking and storage protocols, including NVM Express, SAS, SATA, PCIe, Ethernet and RDMA. Stephen is an Adjunct Professor at The University of Alberta, Canada, is a Senior Member of the IEEE and a Professional Engineer of Canada. He received his PhD and BSc in Engineering from The University of Edinburgh, Scotland.
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Zora Caklovic, Product Expert, SAP Hana Products and Innovation, SAP SE
Zora Caklovic is a Sr Director at SAP Labs Products & Innovation, Palo Alto. Technology leader with more than 25 years of experience across product development, product strategy, product management, and partner management. Broad experience and strong knowledge of enterprise technologies, market drivers and competitive trends. Proficient in cloud, virtualization, in-memory, big data, and analytics products and technologies.
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Jeff Chang, SNIA NVDIMM SIG Co-Chair and VP Marketing and Business Development, AgigA Tech
At AgigA Tech, Jeff has focused on the promotion and evangelization of NVDIMM technology to the industry at-large. He has been instrumental in driving NVDIMMs to where they are today, with broad market acceptance and industry standardization. In addition to his role at AgigA Tech, Jeff is also the co-chair of the NVDIMM Special Interest Group (SIG) within SNIA/SSSI. During his career, Jeff has provided strategic direction in senior marketing roles for both start-up and public company environments. He has managed product portfolios that span multiple end markets including PC, consumer electronics, enterprise, mobile and operator-class communication systems. His most recent roles have included Sr Director of Marketing at Entropic Communications, VP of Marketing at Staccato Communications, and Business Unit Director of the USB Product Line at Cypress Semiconductor.
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Tom Coughlan, Senior Engineering Manager, Red Hat
Tom is the engineering manager for the Filesystem and Storage Group at Red Hat. This group develops Linux support for persistent memory, local, shared and network filesystems, the Logical Volume Manager (LVM), device mapper, and kernel drivers for FC, iSCSI, SAS, and RAID. Tom has over 35 years of experience connecting storage to operating systems.
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Tom Coughlin, President, Coughlin Associates
Tom Coughlin, President, Coughlin Associates is a widely respected storage analyst and consultant. He has over 35 years in the data storage industry with multiple engineering and management positions at high profile companies.. He founded Coughlin Associates, which provides market and technology analysis as well as Data Storage Technical Consulting services Tom is active with a variety of professional organizations, including SMPTE, the IEEE (he is Director for IEEE Region 6 and active in the Consumer Electronics Society) , and SNIA, where he is a frequent speaker and the Education Chair of the SNIA Solid State Storage Initiative. Tom publishes the Digital Storage Technology Newsletter, the Media and Entertainment Storage Report, the Emerging Non-Volatile Memory Report and other industry reports, and is also a regular contributor on digital storage for Forbes.com
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Doug Finke, Director of Product Marketing, Xitore
Bio pending
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Amit Golander, Plexistor
Dr. Amit Golander is the Chief Technology Officer (CTO) and R&D Manager for Plexistor. His responsibilities are to develop the product and work with CEO, Sharon Azulai, on the vision for the technology and products.
Golander brings a rich research, development, and leadership background to Plexistor where he has distinguished himself in both the corporate, startup and higher educational realms.In addition to his work in the business and academic sectors, Golander holds over 50 patents and has published a number of technology articles in prestigious engineering journals.
Prior to Plexistor, Golander was VP of Systems and Product for Primary Data where he was responsible for strategic partnerships, alliances and beta customers as well as worked closely with the R&D teams on the day-to-day product management.Golander also worked for IBM for over twelve years on data center and cloud infrastructure.
Golander has also mentored M.Sc. students and taught computer architecture and quantitative analysis at Tel Aviv University.
Golander received his B.Sc. in C.S.and EE and his Ph.D. from Tel Aviv University in the field of computer architecture. His thesis won the Intel Research Award. Prior to his academic studies, Golander served as an intelligence officer in the Israeli Defense Force (IDF).
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Paul Grun, Open Fabrics Alliance Vice Chair; Advanced Technology Group, Cray, Inc
Paul Grun is a member of Cray’s Advanced Technology Group. During his more than 30 year career he has been intimately involved in all aspects of server I/O beginning with storage for large mainframe systems, turning to high performance network architecture and now focusing on applying I/O technology to building large scale systems at Cray Inc. His association with advanced networking technology stretches back to prior to the emergence of InfiniBand when he represented Intel to the InfiniBand Trade Association (IBTA). He has served as chair of the IBTA’s Technical Working Group and as chair for the working group responsible for creating the RoCE (RDMA over Converged Ethernet) specifications. He is currently active representing Cray as a member of the IBTA’s Steering Committee. Paul has also been influential in the OFA since its inception in 2004; in addition to his current role serving as the OFA’s Vice Chair, he is serving as the co-chair of the OpenFabrics Interfaces Working Group (OFIWG) and as chair of the Data Storage / Data Access Working Group.
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Jim Handy, Gen'l Director, Objective Analysis
Jim Handy of Objective Analysis has over 35 years in the electronics industry including 20 years as a leading semiconductor and SSD industry analyst. Early in his career he held marketing and design positions at leading semiconductor suppliers including Intel, National Semiconductor, and Infineon. A frequent presenter at trade shows, Mr. Handy is known for his technical depth, accurate forecasts, widespread industry presence and volume of publication. He has written hundreds of market reports, articles for trade journals, and white papers, and is frequently interviewed and quoted in the electronics trade press and other media.
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Steffen Hellmold, Vice President, Technology Strategy, Western Digital
As Vice President of Technology Strategy within the WDC Corporate Strategy and Innovation organization, Steffen is responsible for technology strategy development focusing on memory and storage technologies. He has more than 20 years of industry experience in senior product and technical marketing, business development, and sales roles in volatile and non-volatile semiconductor memory, as well as in storage sub-systems.
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Barry Hoberman, CEO and Chairman, Spin Transfer Technologies
Barry Hoberman has over 35 years of management and engineering expertise in the semiconductor industry. He has served as CEO and Chairman of Spin Transfer Technologies since 2012. Prior to that he served as chief marketing officer at Crocus Technology, a semiconductor company. Earlier, Hoberman was the founder and CEO of inSilicon, a leading semiconductor IP supplier, which was acquired by Synopsys in 2002. His leadership experience also includes CEO positions with Virtual Silicon and T-Zero Technologies. Earlier in his career, Hoberman held management positions at AMD and Monolithic Memories. Hoberman holds B.S. degrees in Electrical Engineering and Biology from the Massachusetts Institute of Technology, and over 20 US patents.
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Jeff Janukowicz, IDC
Jeff Janukowicz is a Research Vice President at IDC where he provides insight and analysis on the SSD market for both the Client / PC and Enterprise / Data Center segments. In this role, Jeff provides expert opinion, in-depth market research, and strategic analysis on the dynamics, trends, and opportunities facing the industry. His research includes market forecasts, market share reports, and technology trends for clients, investors, suppliers, and manufacturers. Mr. Janukowicz has an extensive background in storage, semiconductors, and solid state technologies. He brings more than 20 years of experience within the technology industry to IDC, including more than 15 years in storage and the semiconductor industry.
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Jim Pappas, Vice Chair, SNIA Board of Directors; Co-Chair, SNIA Solid State Storage Initiative; Director of Technology Initiatives, Data Center Group, Intel Corporation
Jim Pappas is the Director of Technology Initiatives in Intel’s Data Center Group. In this role, Jim is responsible to establish broad industry ecosystems that comply with new technologies in the areas of Enterprise I/O, Energy Efficient Computing, and Solid State Storage. Jim has founded, or served on several organizations in these areas including: PCI Special Interest Group, InfiniBand Trade Association, Open Fabrics Alliance, The Green Grid, and several emerging initiatives in his newest focus area of Solid State Storage. Jim has previously been the Director of Technology Initiatives in Intel’s Desktop Products Group, and successfully led technologies such as AGP Graphics, DVD, IEEE 1394, Instantly Available PC, PCI, USB, and other advanced technologies for the Desktop PC. Jim has 30 years of experience in the computer industry. He has been granted eight U.S. patents in the areas of computer graphics and microprocessor technologies. He has spoken at major industry events including the Intel Developer’s Forum (IDF), WinHEC, Storage Networking World, PC Strategy, Microprocessor Forum, Consumer Electronics Show, Server I/O and the Applied Computing Conference. He holds a B.S.E.E. from the University of Massachusetts, Amherst, Massachusetts
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Stephen Pawlowski, Vice President, Advanced Computing Solutions, Micron Corporation
Steve Pawlowski is Vice President of Advanced Computing Solutions at Micron Technology. He is responsible for defining and developing innovative memory solutions for the enterprise and high performance computing markets. Prior to joining Micron in July 2014, Mr. Pawlowski was a Senior Fellow and the Chief Technology Officer for Intel’s Data Center and Connected Systems Group. Mr. Pawlowski’s extensive industry experience includes 31 years at Intel, where he held several high-level positions and led teams in the design and development of next-generation system architectures and computing platforms. Mr. Pawlowski earned bachelor’s degrees in electrical engineering and computer systems engineering technology from the Oregon Institute of Technology and a master’s degree in computer science and engineering from the Oregon Graduate Institute. He also holds 58 patents.
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Andy Rudoff, Member, SNIA NVM Programming Technical Work Group and Architect Datacenter Software, Intel Corporation
Andy Rudoff is an Architect in the Datacenter Software Division at Intel Corporation. He has over 25 years experience in operating systems internals, file systems, and networking. Andy is co-author of the popular Unix Network Programming book. His recent work focuses on Non-Volatile Memory Programming models and algorithms for using Persistent Memory.
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Pratap Subrahmanyam, VMware Fellow
Pratap Subrahmanyam is a Fellow at VMware, and leads a small team of engineers considering questions at the intersection of non-volatile memory technologies and virtualization. Byte addressable persistent memory allows computers to be programmed without having to deserialize program data from disk or SSD into RAM, and then serialize the computed results back onto the SSD/disk - a process that is very CPU hungry, involves needless data movement, and power consumption. Pratap's team focusses on developing tools such as, support in the hypervisor for these new devices, libraries for managing consistency of data across crashes, replication to provide availability, compiler and other development tools to aid in the conversion of a traditional application to consume persistent memory.
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Steven Swanson, Professor in the Department of Computer Science and Engineering at the University of California, San Diego and the Director of the Non-volatile Systems Laboratory
Steven Swanson is a professor in the Department of Computer Science and Engineering at the University of California, San Diego and the director of the Non-volatile Systems Laboratory. His research interests include the systems, architecture, security, and reliability issues surrounding non-volatile, solid-state memories. He also co-leads projects to develop low-power co-processors for irregular applications and to devise software techniques for using multiple processors to speed up single-threaded computations. In previous lives he has worked on scalable dataflow architectures, ubiquitous computing, and simultaneous multithreading. He received his PhD from the University of Washington in 2006 and his undergraduate degree from the University of Puget Sound.
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Tom Talpey, Architect, Microsoft
Tom Talpey is an Architect in the File Server Team at Microsoft. His responsibilities include SMB 3, SMB Direct (SMB over RDMA), and all the protocols and technologies that support the SMB ecosystem. Tom has worked for many years in the areas of network filesystems, network transports and RDMA, and recently has been working on applying these to remote access of Persistent Memory, working within the SNIA Nonvolatile Memory Programming TWG, and others
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Rajesh Venkatasubramanian, Principal Engineer at VMware
Rajesh Venkatasubramanian is a Principal Engineer at VMware and he is leading the effort to add persistent memory support to vSphere. Previously, he has led the development of several vSphere memory management features including large page support, memory compression and swap caching on SSD. He enthusiastically participates in evolution of vMotion and distributed resource scheduling (DRS). He is very excited about the opportunities exposed by fast non-volatile memory and keen to enable VMware customers to benefit from this technology. Rajesh received PhD in Computer Science and Engineering from University of Michigan.
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Doug Voigt, Chair, SNIA NVM Programming Technical Work Group and Distinguished Technologist, Hewlett Packard Enterprise
Doug Voigt is a member of the SNIA Technical Council and Chair of the SNIA NVM Programming Model TWG. He is a Distinguished Technologist in the Chief Technologist’s office of HPE’s Storage Division. Doug has over 37 years of development experience in disk drives, disk arrays, storage management and non-volatile memory. He holds CS and EE degrees from Cornell University and 33 US patents, primarily in virtual arrays.
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