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Article

Performance Enhancement of Planar GaAs Photoconductive Semiconductor Switches by Introducing p-Type Epitaxial Layer

by
Jiawei Zong
1,2,
Yating Shi
1,2,
Guang Qian
1,2,*,
Jinpeng Wang
3,
Zelu Wei
1,
Yuechan Kong
1,2,
Jingwen Zhang
3 and
Tangsheng Chen
1,2
1
Nanjing Electronic Devices Institute, Nanjing 210016, China
2
National Key Laboratory of Solid-State Microwave Devices and Circuits, Nanjing 210016, China
3
School of Electronic Science and Engineering, Xi’an Jiaotong University, Xi’an 710049, China
*
Author to whom correspondence should be addressed.
Photonics 2025, 12(2), 152; https://doi.org/10.3390/photonics12020152
Submission received: 5 January 2025 / Revised: 5 February 2025 / Accepted: 7 February 2025 / Published: 13 February 2025
Browse Figures
Figure 1
<p>Device structure of GaAs PCSS with p-type epitaxial layer (P-PCSS).</p> "> Figure 2
<p>The fabrication process of P-PCSS.</p> "> Figure 3
<p>Dynamic test circuit of GaAs PCSS; inset: the relative spectral intensity and far-field beam.</p> "> Figure 4
<p>Test results of specific contact resistivity of P-PCSS.</p> "> Figure 5
<p>Metal–p-type GaAs ohmic contact band diagram.</p> "> Figure 6
<p>Leakage current of three types of GaAs PCSSs; inset: the AFM image of the GaAs surface after the wet etching process.</p> "> Figure 7
<p>The optical absorption of PCSS.</p> "> Figure 8
<p>The relationship between biased voltage and amplitude.</p> "> Figure 9
<p>The output waveform of three PCSSs: (<b>a</b>) P-PCSS, (<b>b</b>) SI-PCSS with Ni/Ge/Au electrode, and (<b>c</b>) SI-PCSS with Ti/Pt/Au electrode.</p> "> Figure 10
<p>The relationship between biased voltage and pulse width/rise time for P-PCSS.</p> "> Figure 11
<p>The damage situation for different switches: (<b>a</b>) SI-PCSS with Ni/Ge/Au; inset: damage details of this PCSS; (<b>b</b>) P-PCSS.</p> "> Figure 12
<p>The damage situation for different electrodes in P-PCSS: (<b>a</b>) anode and (<b>b</b>) cathode.</p> ">
Versions Notes

Abstract

:
Gallium arsenide photoconductive semiconductor switches (GaAs PCSSs) have attracted much attention in pulsed power systems and high-power microwave sources. The quality of ohmic contact has a significant impact on their switching performance. In this article, a 100 nm p-type epitaxial layer and Ti/Pt/Au metal electrodes were introduced into a GaAs PCSS to enhance ohmic contact, resulting in a specific contact resistivity of 3 × 10−4 Ω·cm2. The optimized device exhibited a reduction in dark current from 32.2 μA to 11.7 μA and achieved a peak pulse output of 4 kV under a bias of 8.1 kV. This work provides a new feasible approach for high-power miniaturized solid switches.

1. Introduction

Solid-state semiconductor switches have become increasingly prevalent in pulsed power systems due to their compact size, fast response, and high repetition frequency [1,2]. The photoconductive semiconductor switch (PCSS) is one of the rapidly developing semiconductor optoelectronic devices in recent years [3,4]. It relies on photogenerated carriers produced through the absorption of light pulses to achieve rapid current conduction in a semiconductor medium. Especially, GaAs PCSSs, which can operate in a nonlinear mode due to their special material properties, are recognized for their exceptional performance [5,6]. An optical pulse with nJ energy can trigger GaAs PCSSs to generate a MW-level electrical pulse with an ultra-fast rise time and low delay jitter [7,8]. This capability makes GaAs PCSSs a promising candidate for all-solid-state miniaturized pulsed power sources [9].
However, limited shot time and reliability issues seriously hinder the mass production of GaAs PCSSs [10,11]. GaAs PCSSs in the nonlinear mode exhibit lock-on phenomena and current filaments during operation. The current density within these filaments can reach several MA/cm2 [12]. The high current density and resultant instantaneous heat generation both lead to rapid device degradation, making it challenging to ensure high switch reliability. Additionally, commonly used Ni/Ge/Au electrodes are prone to spherical agglomeration or even detachment under high-voltage and high-current operating conditions [13]. Heat accumulation can also cause metal interdiffusion, thus leading to ohmic degradation. Experimental results have shown that switch damage often initiates at the edges of the metal electrodes and then propagates towards the electrode gap [14].
To improve electrode stability, research groups have conducted various studies. An embedded electrode structure has been introduced into GaAs PCSSs, utilizing a 135° chamfer to reduce current concentration during transient triggering, thereby extending the switch’s lifetime [15]. The adoption of graphene/metal composite electrodes has also been implemented to improve the electrode’s heat dissipation capabilities, enhancing the stability of the switch during operation [16]. A metal structure of Pd/Ge/Ti/Pt/Au on a SI-GaAs substrate has also demonstrated favorable results [17]. However, the aforementioned scheme is not compatible with traditional GaAs device fabrication processes, which is detrimental to the large-scale production of GaAs PCSSs.
In this paper, we propose the introduction of a p-type epitaxial layer to improve the ohmic contact quality of GaAs PCSSs. This approach not only enhances the performance of the PCSSs but also facilitates their large-scale manufacturing because the growth and etching processes are mature production technologies in traditional GaAs devices [18]. The experimental results indicate that the optimized device exhibited improved performance and suffered from less damage.

2. Device Fabrication and Measurement

2.1. Device Structure

The planar PCSS enables faster current conduction, resulting in a faster response speed and smaller jitter. Consequently, as shown in Figure 1, the planar design was employed in this article. To match the shape of the light spot, the spacing between two electrodes was set as 2 mm. The design of rounded rectangular electrodes was adopted to reduce the peak electric field intensity near the electrode edges. The two-dimensional electrical field simulations revealed that, compared to rectangular electrodes, the peak electric field of rounded rectangular electrodes decreased from 182.8 kV/cm to 79.7 kV/cm under an 8 kV bias. This reduction enhanced the reliability of the device. Meanwhile, a 100 nm p-type epitaxial layer was introduced beneath the electrodes.

2.2. Fabrication Process

The switch was built on a 625 μm thick semi-insulating GaAs wafer. The substrate exhibited a bulk resistivity exceeding 1 × 107 Ω·cm and a carrier mobility over 6000 cm2/(V·s). A 100 nm p-type epitaxial layer was grown on the substrate using molecular beam epitaxy (MBE; Veeco GEN2000). During the MBE growth process, p-type GaAs was achieved by Be doping. The growth rate of p-type GaAs was 0.27 nm/s at 600–700 °C. A 100 nm thick p-type epitaxial layer was ultimately obtained. The material properties of the epitaxial layer are summarized in Table 1. The mobility of the epitaxial layer was 148 cm2/(V·s) and the sheet resistance was 1700 Ω/sq. Meanwhile, the p-type GaAs exhibited excellent uniformity across a 4-inch wafer.
Figure 2 illustrates the fabrication process. Initially, the substrate was ultrasonically cleaned with acetone, ethanol, and deionized (DI) water. The wafer was then immersed in a 10% hydrochloric acid solution to remove metal oxides. The electrode pattern was then transferred to the surface via photolithography. A metal stack of Ti/Pt/Au was deposited, followed by excess metal removal using a lift-off process. A GaAs wet etchant was employed to remove the epitaxial layer outside the electrode-covered area. The wafer was annealed at 400 °C for 60 s to form ohmic contacts and repair lattice damage. Subsequently, a 700 nm Si3N4 film was deposited using plasma-enhanced chemical vapor deposition (PECVD). The metal electrodes were then exposed using photolithography and inductively coupled plasma (ICP) etching. PCSSs were also fabricated directly on semi-insulating substrates, serving as a control group for comparison. Compared to the P-PCSS, the preparation of switches on semi-insulating substrates (SI-PCSS) eliminated the step of wet etching. To compare electrode performance, two metal stacks (a. Ti/Pt/Au, b. Ni/Ge/Au) were used. Finally, all GaAs wafers were diced to form individual PCSS chips (size: 12 × 7 × 0.625 mm3).

2.3. Test Circuit of GaAs PCSS

A semiconductor parameter analyzer (Keysight B1500A) was used to test the ohmic contact characteristics of the PCSSs. A Dielectric Withstand Tester (Formfactor Cascade T200) was used to test the dark state of GaAs PCSSs. The testing system demonstrated a maximum achievable test voltage of 10 kV. During the dark-state testing, the PCSSs were submerged in FC40 insulating oil, and probes were inserted into each electrode.
The dynamic test circuit of GaAs PCSSs is shown in Figure 3. To prevent flashover on the PCSS surface, the switch was also immersed in insulating oil. A 10 pF capacitor was charged by a DC power supply through a 10 MΩ current-limited resistor. The positive terminal of the switch was connected to the capacitor’s charging terminal, while the negative terminal was connected to a 40 dB attenuator, which was then connected to an oscilloscope (Tektronix TDS 3054C). A Rogowski current loop was used to measure the pulse current signal in the discharge circuit.
The GaAs PCSS was triggered by a 905 nm semiconductor laser (Laser Components 905D3S3J09S). The peak power of the laser was 220 W and the spectral bandwidth was 5.5 nm. The pulse width was 30 ns and the rising edge was 15 ns. The laser spot was positioned between the two electrodes. Its length was adjusted to approximately 2 mm, which corresponds to the inter-electrode distance. Upon laser triggering, the capacitor began discharging. The resulting pulse signal was attenuated and then fed into the oscilloscope.

3. Results and Discussion

3.1. Dark-State Characteristics of GaAs PCSS

The ohmic contact on p-type GaAs was evaluated using the Transmission Line Method (TLM), with the results presented in Figure 4. The specific contact resistivity was measured to be 3.38 × 10−4 Ω·cm2. In comparison, two types of ohmic contact metals fabricated directly on SI-GaAs exhibited a specific contact resistivity greater than 1 Ω·cm2.
The quality of the ohmic contact significantly affects the lifetime and reliability of PCSSs. The barrier at the metal–semiconductor interface hinders the movement of carriers, ultimately affecting the magnitude of the contact resistance [19]. The band structure after the combination of p-type GaAs and metal is shown in Figure 5.
The specific contact resistance of a contact is determined according to Equation (1):
ρ c = ∂ J ∂ V − 1 V = 0 ,
where J is the current density and V is the voltage.
For p-type GaAs, the tunnel current, i.e., the current caused by thermionic-field emission and field emission, dominates the current transport [20]. The current density is given in Equation (2):
J ∝ exp − 2 ⋅ l o ⋅ 2   m p q ϕ B p + qV ℏ 2 ,
where l o is the width of the space charge region, mp is the effective mass of the hall, ϕ B p is the barrier height, ℏ is Planck’s constant, and q is the electronic charge. l o is determined in Equation (3):
l o = 2 ε s q   N A V b i − V ,
where ε s is the relative permittivity, N A is the concentration of the hall, and V b i is the barrier height.
By solving the above equations, the specific contact resistivity can be expressed as Equation (4):
ρ c ∝ exp 2 ε s   m p ℏ ⋅ ϕ B p N A ,
For p-type GaAs, its, N A is equal to its doping concentration (3 × 1018 cm−3). For SI-GaAs, its carrier concentration may range between 106 and 108 cm−3. In fact, the specific contact resistivity of SI-GaAs may be related only to the barrier height [21].
Thus, it can be concluded that due to the high doping concentration, the depletion region at the metal–semiconductor interface becomes narrower. The narrow depletion region reduces the width of the potential barrier. Carriers can tunnel through this thinner barrier more readily.
High leakage current augments the risk of self-triggering, thereby diminishing the reliability of the devices [22]. The leakage currents of PCSSs between 0 and 10 kV are depicted in Figure 6. The current curve of the P-PCSS was approximately linear over this range, reaching 11.7 μA at 10 kV. For the SI-PCSS with Ti/Pt/Au electrodes, the leakage current increased more rapidly. The current already reached 20 μA at 6 kV. Above 6 kV, the current curve of the switch transitioned from linear growth to exponential growth, ultimately reaching 80 μA at 10 kV. Under DC bias conditions, such a high leakage current would exacerbate thermal accumulation during operation of the device. The SI-PCSS with Ni/Ge/Au electrodes displayed a relatively low leakage current. Nevertheless, when the bias voltage exceeded 6 kV, the current also demonstrated exponential growth, with a maximum leakage current of 32.2 μA at 10 kV. All the devices were not broken at 10 kV. But the leakage current of SI-PCSSs exhibited fluctuations within a range of approximately 5 μA near 10 kV, while the leakage current of the P-PCSS remained stable. This indicates that SI-PCSSs were nearing their voltage endurance limit at this juncture. Moreover, the voltage endurance of the P-PCSS could potentially be even higher.
During the fabrication process, Atomic Force Microscopy (AFM) was conducted to test the surface of the P-PCSS after wet etching. The surface roughness Root Mean Square (RMS) value was 0.25 nm, comparable to that of the SI substrate. This implies that the etching process does not cause significant degradation to the surface. Combined with enhanced ohmic contact, the P-PCSS exhibited a relatively low leakage current performance even under high voltage.

3.2. Light-Triggered Characteristics of GaAs PCSS

In this study, extrinsic photoconductivity was employed, meaning that the wavelength of the laser (905 nm) exceeds the intrinsic absorption edge of GaAs (876 nm). This condition results in a relatively deep absorption depth, which increases the effective volume of the PCSS and thereby enhances device stability [23]. The optical absorption mechanism in the GaAs PCSS is associated with impurity absorption or defect absorption [24,25]. As shown in Figure 7, the optical absorbance of the GaAs PCSS was characterized across the wavelength range of 700 to 1200 nm. Through direct measurements of transmittance and reflectance, the absorbance of the GaAs PCSS was determined to be 17.2% at 905 nm.
Figure 8 illustrates the relationship between the bias voltage and peak output voltage for these devices. The P-PCSS operated in the linear mode below 4 kV, with a maximum output voltage of 382 V at a 4 kV bias voltage. At 4.4 kV, it transitioned into the nonlinear mode and the peak output voltage was 1351 V. As the bias voltage increased, the output voltage subsequently rose, reaching a maximum of 4 kV at an 8.1 kV bias voltage.
Below 4 kV, the output of three devices was approximately the same, with voltage conversion efficiencies of 9.6% for the P-PCSS, 7.3% for the SI-PCSS with Ni/Ge/Au electrodes, and 6.7% for the SI-PCSS with Ti/Pt/Au electrodes. The nonlinear threshold of the SI-PCSS increased significantly. Even at the point of device breakdown, the switch did not enter the nonlinear state. For the SI-PCSS with Ni/Ge/Au electrodes, as the bias voltage increased, the peak voltage also increased approximately linearly. However, once the bias voltage exceeded 7500 V, an increase of 500 V in the bias voltage brought an increase of 673 V in the output amplitude. The SI-PCSS with Ti/Pt/Au electrodes produced an output of 500 V at a 6500 V bias and 600 V at a 7000 V bias. In both SI-type switches, further increases in bias voltage after the enhancement in conversion efficiency would lead to device breakdown.
The output waveforms of the PCSSs are presented in Figure 9a–c. Despite identical testing conditions, the three devices exhibited different output characteristics. The behavior of the SI-PCSSs closely resembled that of the optical pulse. The output amplitude increased with increasing bias voltage, while the rise time and pulse width remained constant. This indicated that within the tested voltage range, the SI-PCSS operated in the linear state. However, the SI-PCSS with Ni/Ge/Au electrodes exhibited waveform transformation at an 8000 V bias. Initially, it showed a linear response for 10 ns, followed by a rapid voltage increase from 651 V to 1324 V within 5.42 ns. This behavior was attributed to the initial accumulation of photogenerated carriers. Eventually, the carriers reached the threshold of avalanche multiplication.
A similar transition from a linear to a nonlinear state occurred at 4.4 kV in the P-PCSS, as shown in the inset of Figure 9a. The voltage increase rate became significantly sharper at this point, corresponding to an electric field strength of approximately 22 kV/cm between the P-PCSS electrodes. Under this field, photogenerated carriers entered the negative differential mobility (NDM) region [26], forming a high-field domain. When the electric field within this domain exceeded the impact ionization threshold, an avalanche domain formed, driving the switch into a nonlinear state. As the bias voltage increased, the linear state duration shortened, and the output amplitude increased. This is attributed to the increased impact ionization rate of carriers with higher bias electric fields [27].
Figure 10 illustrates the changes in the rise time and pulse width of the P-PCSS with increasing biased voltage. Significant differences were observed across different operating states. When the voltage was below 4.4 kV, the rise time remained unchanged. When the voltage exceeded 4.4 kV, the rise time decreased rapidly to 1.6 ns. This is because, in the nonlinear state, the rise time is determined by the avalanche buildup rate rather than the optical pulse response speed [28]. Meanwhile, upon entering the nonlinear state, the output pulse width of the P-PCSS decreased to less than 8 ns, representing a significant reduction compared to the light pulse width. When the charging capacitance was 680 pF, the output pulse width of the P-PCSS was 20 ns. The narrowing of the pulse width reduces the thermal accumulation during the switch operation, which is beneficial for high-repetition conditions [29]. By adjusting the external capacitance, the output pulse can be modulated. During the conduction process, a smaller capacitance discharges more rapidly, causing the PCSS bias voltage to decrease quickly. When the bias voltage was insufficient in meeting the threshold electric field required for the nonlinear mode of the GaAs PCSS, the switch exited the nonlinear mode [30].

3.3. Damage Characteristics of GaAs PCSS

Microscopic examination of the post-test samples revealed distinct damage characteristics among different devices. Given that the operating voltage of the SI-PCSS with Ni/Ge/Au electrodes and the P-PCSS both reached an 8 kV operating voltage, the damage characteristics of these devices were examined by SEM and FIB. As shown in Figure 11, the damage of the SI-PCSS with Ni/Ge/Au was more severe. The Ni/Ge/Au electrode detached after device testing. This phenomenon is attributed to the poor thermal stability of Ni/Ge/Au metal [31]. During switching operations, high peak currents and rapid thermal accumulation increase thermal stress, leading to electrode detachment. In contrast, the Ti/Pt/Au metal demonstrated excellent thermal stability and strong adhesion to the GaAs substrate. In addition to the electrode damage, a current damage channel at the electrode gap was also observed. The width of the damaged channel was about 10–40 μm. The damage path originated from the anode and extended toward the cathode. The propagation of these damage channels was accompanied by thermal expansion, ultimately leading to the detachment of the passivation layer, and the fragmentation of the substrate. Spherical particles were observed in the current-damaged channels, resulting from the recrystallization of gallium arsenide after melting at high temperatures.
As shown in Figure 11b, the P-PCSS experienced less damage. It is worth noting that the black marks on the surface of the P-PCSS are adhesive residues from the device disassembly process. The damaged region was primarily confined to the electrode edges, with damage typically occurring at the interfaces between the electrode, passivation layer, and GaAs material.
Corrosion pits exceeding 10 μm in depth formed on the GaAs substrate. As shown in Figure 12, the anode exhibited significantly greater damage than the cathode, attributed to the elevated electric field caused by Gunn oscillations [13]. Under the influence of the electric field, high-energy electrons interact with gallium arsenide, thereby leading to GaAs crystal melting. Additionally, the passivation layer on the P-PCSS was uneven, with certain areas presenting protrusions. This phenomenon can be attributed to the mismatch between the thermal expansion coefficients of SiN and GaAs.
The high-density current filaments during the switch conduction process and the resulting localized high temperatures are significant causes of performance degradation in GaAs PCSSs. The classic equation for thermal breakdown is given by Equation (5) [32]:
C V ⋅ d T d t − ∇ · k ∇ T = σ E 2 ,
where C V is the specific heat of the GaAs PCSS, k is the thermal conductivity, σ is the conductivity of GaAs, E is the bias electric field, T is the temperature of the GaAs PCSS, t is the conduction time of the switch. Considering that the switch triggering process can be regarded as a transient adiabatic process, the second term on the left-hand side can be neglected. The current density in the conductive channel can be expressed as Equation (6):
J = σ E = n q v d ,
where J is the current density in the plasma channel, n is the concentration of photoexcited carriers, q is the quantity of charges per carrier, and v d is the average drift velocity of the photoexcited carriers. Combining Equations (5) and (6), the thermal dissipation equation within the current filament during device operation is Equation (7):
Δ T = J E ρ C V Δ t ,
where ρ is the density of GaAs materials. From the equations, it can be observed that the current density and electric field strength play a significant role in the temperature increase during the operation of the PCSS. Based on the nonlinear operating principle of the PCSS during the operation of the switch, the charge density within the current channel is extremely high [12]. In this experiment, the current density in the current channel was calculated to be as high as 104–105 A/cm2.
The electric field strength in the current filament channel and at the electrode edges is significantly higher than that in other regions of the PCSS [31]. Consequently, these regions experience high temperatures and localized damage. Based on the electric field simulation data from the relevant literature [26,33], here, we selected ρ as 5.31 g/cm3, C V as 0.327 J/(g·K), J as 105 A/cm2, E as 90 kV/cm-200 kV/cm, and Δ t as 10 ns. The spot temperature rise achieved by a single-shot triggered photoconductive switch can reach 51.8–115.2 K. The thermal accumulation from long-term operation can lead to the melting of the GaAs crystal. This is consistent with our experimental observations.
Regarding the Joule heat at the electrode and metal interface, the heat is related to the current density and the contact resistance Rc. Considering that the specific contact resistivity of the SI-PCSS is higher than that of the P-PCSS, the heat generated at the SI-PCSS electrode will be significantly greater than that at the P-PCSS. Additionally, since the thermal stability of Ni/Ge/Au is relatively poor [29], the damage to Ni/Ge/Au would be more severe than that to Ti/Pt/Au.
Meanwhile, the thermal stress at the interface between GaAs and the electrode can be expressed as Equation (8):
σ t h = E s E f E s + E f α s − α f Δ T
where σ t h is the interfacial thermal stress, E s and E f are the Young’s moduli of GaAs and the metal electrode, α s and α f are the coefficients of thermal expansion of GaAs and the metal electrode, and ΔT is the temperature change. In the contact areas between the electrode and GaAs substrate, the thermal expansion coefficient and elastic modulus of the metal electrode are larger than those of the GaAs substrate. Considering that the temperature around the electrode varies greatly, the thermal stress around the electrode is considerable. Here, we select ΔT = 115.2 K, E s = 83 Gpa, and α s = 5.8 × 10−6 K−1, the metal type is set to Ni, E f = 200 Gpa, and α f = 13.3 × 10−6 K−1. The thermal stress can reach −49.2 Mpa. Excessive thermal stress can lead to cracking and even electrode separation [34].
To enhance the device’s reliability, future optimization efforts can be focused on adjusting the device structure and the optical triggering method to reduce the peak current density and electric field strength. Additionally, employing passivation layer materials with high thermal conductivity (such as aluminum nitride and diamond) and electrode metals with better thermal stability can facilitate the dissipation of accumulated heat.

4. Conclusions

In this paper, a p-type epitaxial layer and Ti/Pt/Au electrodes were introduced into a GaAs PCSS, achieving favorable outcomes. Compared to the SI-PCSS, the P-PCSS showed a 64% reduction in leakage current, decreasing from 32.2 µA to 11.7 µA at 10 kV. P-PCSSs entered the nonlinear state at 4.4 kV and achieved an output voltage of 4 kV under 8.1 kV bias. Post-testing examination revealed that P-PCSSs sustained minimal damage. These results offer valuable insights for advancing high-repetition-rate, high-voltage photoconductive switch technology.

Author Contributions

Conceptualization, G.Q., J.Z. (Jiawei Zong) and Y.S.; methodology, J.Z. (Jiawei Zong) and Y.S.; software, J.Z. (Jiawei Zong); validation, J.Z. (Jingwen Zhang), G.Q. and T.C.; formal analysis, J.Z. (Jiawei Zong) and J.W.; investigation, J.Z. (Jiawei Zong), Z.W. and J.W.; resources, J.Z. (Jiawei Zong) and J.W.; data curation, J.Z. (Jiawei Zong) and J.W.; writing—original draft preparation, J.Z. (Jiawei Zong); writing—review and editing, G.Q. and Y.S.; visualization, J.Z. (Jiawei Zong) and Y.S.; supervision, J.Z. (Jingwen Zhang), G.Q. and Y.K.; project administration, Y.K. and T.C.; funding acquisition, G.Q. and T.C. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

The data presented in this study are available on request from the corresponding author.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Device structure of GaAs PCSS with p-type epitaxial layer (P-PCSS).
Figure 1. Device structure of GaAs PCSS with p-type epitaxial layer (P-PCSS).
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Figure 2. The fabrication process of P-PCSS.
Figure 2. The fabrication process of P-PCSS.
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Figure 3. Dynamic test circuit of GaAs PCSS; inset: the relative spectral intensity and far-field beam.
Figure 3. Dynamic test circuit of GaAs PCSS; inset: the relative spectral intensity and far-field beam.
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Figure 4. Test results of specific contact resistivity of P-PCSS.
Figure 4. Test results of specific contact resistivity of P-PCSS.
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Figure 5. Metal–p-type GaAs ohmic contact band diagram.
Figure 5. Metal–p-type GaAs ohmic contact band diagram.
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Figure 6. Leakage current of three types of GaAs PCSSs; inset: the AFM image of the GaAs surface after the wet etching process.
Figure 6. Leakage current of three types of GaAs PCSSs; inset: the AFM image of the GaAs surface after the wet etching process.
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Figure 7. The optical absorption of PCSS.
Figure 7. The optical absorption of PCSS.
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Figure 8. The relationship between biased voltage and amplitude.
Figure 8. The relationship between biased voltage and amplitude.
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Figure 9. The output waveform of three PCSSs: (a) P-PCSS, (b) SI-PCSS with Ni/Ge/Au electrode, and (c) SI-PCSS with Ti/Pt/Au electrode.
Figure 9. The output waveform of three PCSSs: (a) P-PCSS, (b) SI-PCSS with Ni/Ge/Au electrode, and (c) SI-PCSS with Ti/Pt/Au electrode.
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Figure 10. The relationship between biased voltage and pulse width/rise time for P-PCSS.
Figure 10. The relationship between biased voltage and pulse width/rise time for P-PCSS.
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Figure 11. The damage situation for different switches: (a) SI-PCSS with Ni/Ge/Au; inset: damage details of this PCSS; (b) P-PCSS.
Figure 11. The damage situation for different switches: (a) SI-PCSS with Ni/Ge/Au; inset: damage details of this PCSS; (b) P-PCSS.
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Figure 12. The damage situation for different electrodes in P-PCSS: (a) anode and (b) cathode.
Figure 12. The damage situation for different electrodes in P-PCSS: (a) anode and (b) cathode.
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Table 1. The material parameters of p-type GaAs grown by MBE.
Table 1. The material parameters of p-type GaAs grown by MBE.
Doping ConcentrationMobilitySheet Resistance
3 × 1018 cm−3148 cm2/(V·s)1700 Ω/sq
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MDPI and ACS Style

Zong, J.; Shi, Y.; Qian, G.; Wang, J.; Wei, Z.; Kong, Y.; Zhang, J.; Chen, T. Performance Enhancement of Planar GaAs Photoconductive Semiconductor Switches by Introducing p-Type Epitaxial Layer. Photonics 2025, 12, 152. https://doi.org/10.3390/photonics12020152

AMA Style

Zong J, Shi Y, Qian G, Wang J, Wei Z, Kong Y, Zhang J, Chen T. Performance Enhancement of Planar GaAs Photoconductive Semiconductor Switches by Introducing p-Type Epitaxial Layer. Photonics. 2025; 12(2):152. https://doi.org/10.3390/photonics12020152

Chicago/Turabian Style

Zong, Jiawei, Yating Shi, Guang Qian, Jinpeng Wang, Zelu Wei, Yuechan Kong, Jingwen Zhang, and Tangsheng Chen. 2025. "Performance Enhancement of Planar GaAs Photoconductive Semiconductor Switches by Introducing p-Type Epitaxial Layer" Photonics 12, no. 2: 152. https://doi.org/10.3390/photonics12020152

APA Style

Zong, J., Shi, Y., Qian, G., Wang, J., Wei, Z., Kong, Y., Zhang, J., & Chen, T. (2025). Performance Enhancement of Planar GaAs Photoconductive Semiconductor Switches by Introducing p-Type Epitaxial Layer. Photonics, 12(2), 152. https://doi.org/10.3390/photonics12020152

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