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BY-NC-ND 3.0 license Open Access Published by De Gruyter April 1, 2017

An Effective Technique for Reducing Total Harmonics Distortion of Multilevel Inverter

  • G. Nageswara Rao EMAIL logo , K. Chandra Sekhar and P. Sangameswararaju

Abstract

In this paper, an adaptive neuro fuzzy interference system (ANFIS) is proposed for eliminating voltage harmonics present in the multilevel inverter. It is achieved by reducing the total harmonic distortion (THD) present in the multilevel inverter output voltage. Here, the voltage variation of the multilevel inverter is determined from the actual load voltage and the reference voltage. The voltage variations at different time intervals have been applied to the ANFIS. According to the voltage variations, the switching angles can be generated from the interference system. These switching angles can make the multilevel inverter output voltage with reduced THD. The proposed technique is implemented in the MATLAB/simulink working platform. The effectiveness of the proposed method is evaluated by the multilevel inverter output voltage without controller and with neuro fuzzy controller (NFC).

1 Introduction

A multilevel inversion known by the power conversion approach diminishes the total harmonic distortion (THD) by getting the output voltage in steps and taking the output nearer to a sine wave [9]. Generating an estimated sinusoidal voltage from multiple stages of dc voltages, usually taken from capacitor voltage sources, is the general objective of multilevel inverters [19]. Using transformers, a multi-pulse inverter like 6-pulse or 12-pulse inverter accomplishes harmonic with reactive power (VAR) compensation through numerous voltage-source inverters interrelated in a crisscross manner [29]. A few power electronics applications are flexible ac transmission systems, renewable energy sources, uninterruptible power supplies, and active power filters, in which multilevel inverters are significant [21].

For power increase and harmonics reduction of AC waveform, multi-level inverters (MLI) have materialized as a victorious and practical solution [30]. Nonlinear loads like adjustable speed drives, electronically ballasted lighting, and the power supplies of the electrical equipment applied in present offices affect current harmonics in recent electrical allocation systems [1]. By these harmonic currents, voltage alteration is generated as they unite with the impedance features of the supply systems [33]. Extra heating losses, shorter insulation lifetime, increased temperature and insulation stress, decreased power factor, decreased output, efficiency, ability, and deficiency of plant system performance happen, thus of a raise in the harmonic alteration component of the transformer [5].

To diminish the problem of harmonics, different methods have been recognized. A few examples are (1) specific harmonic elimination (SHE) [2], which is applied for abolition of discarded lower-order harmonics and control of fundamental voltage in a square wave; (2) harmonic elimination pulse width modulation (HEPWM) technique that has a number of advantages compared to traditional sinusoidal PWM (SPWM) for voltage source inverters (VSI) [10, 26]. Eradication of harmonics in nonlinear system is, moreover, attained using a non-natural neural network [3]. Lately, shunt active power filter is commonly utilized for eliminating harmonics and for improving power factor to eradication of the negative and zero series elements [8].

Intended for abolition of harmonics, active power filters are widely employed. The shunt compensator APF exterminates commotion in current, whereas the series compensator dynamic voltage restorer (DVR) destroys turbulence in voltage [7]. By avoiding generation or consumption of reactive power, the load harmonic currents can be effectively reimbursed with fundamental frequency components by planning the active filter controller to take out and insert load harmonic currents and maintain up a steady dc capacitor voltage [32]. Using pulse width modulation or by controlling the dc-link voltage, it has the prospective to change the amplitude of the synthesized ac voltage of the inverters [11, 12]. The plan of the power semiconductor device, modulation technique applied for controlling the switches and the plan of the coupling elements pressure the presentation of APF. A solitary technique applied to recognize active filter current indications is by linking Lf and Cf on the AC and DC sides correspondingly and standards can be met and power rating of the APF can be reduced by employing choosey harmonics compensation [18, 20].

A number of literary works associated to mitigation of harmonics in multilevel inverter is present in the literature. Some of the most new literature works in this subject are assessed in this part. The harmonic eradication problem in PWM inverter, treated as an optimization problem and worked out by means of particle swarm optimization (PSO) method, has been proposed by Raya et al. [23]. In the PSO algorithm, the obtained equation for computation of THD of the output voltage of PWM inverter was applied as the intent function. The objective function was reduced to supply the minimum THD in the voltage waveform, and the consequent switching angles were calculated. The technique was used to examine the switching samples of both the unipolar and bipolar cases. By integrating the constraints in the PSO algorithm, the individual chosen harmonics like the 5th, 7th, 11th, and 13th could be managed inside the allowable limits while reducing the objective function. A seven-level inverter for attaining reduction in the number of harmonics with a number of switches has been proposed by Reddy et al. [16]. The whole harmonic distortion percentage for the seven-level inverter has been calculated. They have attained harmonic reduction by choosing appropriate switching angles. To end with, they have compared the harmonics in dissimilar levels of the multilevel inverter. The THD value is negligible for the seven-level inverter that has been proven by the comparison. The reproduction results have matched with the forecast and firmly counterparted with the experimental results.

The designs fuzzy logic controller (FLC) that is a law based for multilevel inverter has been proposed by Chitra et al. [4]. For regulating the multilevel inverter, the DC link voltage has been reserved steady, and the modulation index of the inverter has been differed. Following a wide-ranging assessment of the advantages of the nine-level cascaded H Bridge multilevel inverter topology, it has been extended as the test system for the plan of the FLC. Long-established control methods have been mostly restricted to the direct and indirect influence of the inverter. Employed for harmonic reduction, Manokaran et al. [17] have offered multilevel VSI circuit-supported simulation of STATCOM. For multilevel inverters based on cascaded converter, intermediate to high power reactive compensation function has been applied. Voltage ripple-caused harmonics have been reduced in STATCOM and have led to the decrease in the size of inductor and DC capacitor. Lesser number of tools has been the significant value of STATCOM. The reply of VSI to reactive power modification has been remarkably fast [27].

Kumar et al. [14] have suggested eliminating some great lower-order harmonics, along with regulating too much magnitude of output voltage of a multilevel inverter by means of an optimization method for computing switching angles at basic frequency switching plan by working out choosy harmonic elimination equations, which are nonlinear transcendental equations. Simple, multiple, or even no solution may survive for a precise value of a modulation index, as these equations are nonlinear transcendental in life. The plan of the suggested method is executed in such way as to compose exact knowledge of initial guess needless for getting all feasible solutions. In addition, their technique has been suitable for a higher level of multilevel inverters where computational load is too much making switching angles computation unfeasible by other obtainable methods. The solutions that produce least THD in the output voltage are chosen where multiple solutions survive for the values of modulation indices. For attaining an outstanding reduction in THD, multiple solution sets have been taken into report rather than captivating a single set of solution. By computing the switching angles by means of PSO method, the chosen lower-order harmonics of multilevel inverter, offered by Raya et al. [23], were eradicated, while the overall voltage THD was optimized. The discontinuity in the solution of the chosen harmonic elimination (SHE) problem at definite modulation indices was evaded by optimizing the individual harmonics to permissible limits. As selecting the set of solution leading to minimum THD, the sudden changes in the switching angles were abandoned by limiting the voltage THD inside permissible limits. Moreover, by further switching along with the lower-order harmonics, the chosen higher-order harmonics were eradicated [28].

In multilevel inverters, the function of choosy harmonic eradication pulse width modulation (SHEPWM), for the removal of low-order harmonics has been suggested by Sahali and Fellah [25]. Evidently, a possible solution does not present for the related equations for definite operating points associated to the modulation index (M). As a result, detrimental harmonics like the 5th harmonic has carried on being present in the output waveform. A boost in the quantities of freedom has been completed by a diminish in the eliminated harmonics. Therefore, the number of operating points in which lower-order harmonics is eliminated has risen. Genetic algorithm (GA) has been applied for optimization purposes.

The power quality upholds is one of the significant missions a tool has in which operating is based on a power electronics device. Because of the nonlinearity loads linked in the system, power quality problem happens. These nonlinear loads cause diverse kinds of power quality problem in the system such as harmonics sags, etc. By reducing the power quality of the system, the power quality of the system is sustained. Different kinds of power quality improvement methods are applied for reducing the power quality problem. Along with these techniques, the soft computing methods such as fuzzy logic, neural network, neuro fuzzy, etc., are generally applied methods for power quality development. For reimbursing power quality problem, fuzzy logic is applied. It is one of the top methods for the linear controlling problem; however, it is not appropriate for nonlinear cases. Besides, this method is activated on the basis of the learning rule. The learning rule generation process is a complicated one, and so, it takes a sizeable amount of time to produce the learning rules. For working out the power quality problem, neural networks need a teaching data set. Hence, neural networks are, moreover, unsuccessful in developing the power quality. The neuro fuzzy controller (NFC), furthermore, has the hybridization problem. A joined controller is required to defeat these problems.

An adaptive neuro fuzzy interference system (ANFIS) is suggested for removing voltage harmonics given in the multilevel inverter in this paper. It is accomplished by diminishing the THD there in the multilevel inverter output voltage. From the genuine load voltage and the reference voltage, the voltage deviation of the multilevel inverter is found out at this point. The voltage deviation at a dissimilar time interval has been employed to the ANFIS. The switching angles can be found out from the interference system according to the voltage deviations. Then, the THD of the suggested technique is determined. By the multilevel inverter output voltage exclusive of controller, the efficiency of the suggested method is assessed with NFC. The remaining of the paper is sorted out as follows: Section 2 explains the suggested technique with adequate mathematical models and pictures. Section 3 converses the accomplishment results, and Section 4 ends the paper.

2 Harmonic Elimination of the Multilevel Inverter using ANFIS

The multilevel inverter has better working performance compared to the conventional pulse width modulation (PWM) inverters. It provides even voltage sharing, both statically and dynamically, reducing the size and volume due to the elimination of the bulky coupling transformers or inductors. The harmonic elimination is the difficult task of the multilevel inverter because the linear and nonlinear load causes harmonics in the output voltage. In order to minimize the THD of the output voltage, it should characterize the output power quality of the multilevel inverter. The power quality compensation process can be done by the proposed ANFIS controller. The overall process of the proposed harmonic elimination technique is described in the following Figure 1.

Figure 1: Structure of the Proposed Method.
Figure 1:

Structure of the Proposed Method.

The proposed harmonic elimination using ANFIS technique can be used to generate the controlling pulses of the power electronic switches, i.e. IGBT (insulated gate bipolar transistor). The controlled switching pulses are used to minimize the THD present in the multilevel inverter output voltage (Vout) as the reduction of THD leads to eliminate the harmonics present in the inverter output voltage and improve the power quality. The proposed method compares the inverter output voltage (Vout) and reference voltage (Vref) because the output voltage of the multilevel inverter contains harmonics and sag. The difference between the actual load voltage and the standard reference voltage is known by error voltage (EV). The determined error voltage (EV) and change in error voltage (d(EV)/dt) are the input of the proposed ANFIS controller, and it is trained with the target switching angles. Finally, it generates the controlling pulses according to the error voltage. This process can reduce the THD present in the output voltage and improves the output power quality. The proposed control technique involving components are briefly explained in the following sections.

2.1 THD Calculation of the Multilevel Inverter

The proposed harmonic elimination process has been performed in the seven-level multilevel inverter. The proposed inverter has three H bridges, which are connected to own identical DC sources. Each bridge contains four IGBTs, and the outputs of the different levels of the H-bridge cells are connected in series. The total output voltage of the proposed inverter is the seven-level staircase waveform. The fundamental output voltage of the multilevel inverter can be described in the following Eq. (1), and the THD calculation is given in Eq. (2):

(1)Vout(ωt)=4πVdc2n=1,3,51n[cos(nα1)+cos(nα2)++cos(nαs)]sin(nωt)
(2)THD=k=2n[Vout(k)]2V1

where, Vout (ωt) is the multilevel inverter output voltage, Vdc is the input dc voltage, α1, α2, and αs are the switching angles, and Vout (k) is the output voltage of the kth order. The control pulses for the multilevel inverter are generated with the use of the proposed ANFIS. The overview of the proposed ANFIS model is given in the following Section 2.2.

2.2 Overview of the ANFIS Model

In order to solve the power quality problem of the multilevel inverter, ANFIS has been used, i.e. as a hybrid model. This model combines the well-enhanced expert’s knowledge and the learning capability of the neural networks. In the proposed model, the switching control pulses are generated to eliminate the THD. Here, the error voltage has been calculated between the actual load voltage and the reference sinusoidal voltage which is shown in Figure 2. The ANFIS regulate error voltage and the appropriate switching pulses are generated, which is used to operate the multilevel inverter in a feasible conduction, i.e. improved power quality. The proposed ANFIS represents the error voltage (EV), and the changes in error voltage [CEV or (d(EV)/dt)] are the inputs. With two fuzzies, a common rule set is developed for a zero-order Sugeno fuzzy model, and it is explained below.

Rule 1: If EV is X1 and CEV is Y1 then f1=A1(EV)+B1(CEV)+C1

Rule 2: If EV is X2 and CEV is Y2 then f2=A2(EV)+B2(CEV)+C2

where, A1, A2, B1, B2, C1 and C2 are the linear parameters, and X1, X2, Y1 and Y2 are the nonlinear parameters. The following figure shows the fuse reasoning.

In general, the ANFIS has five layers of the proposed system: fuzzy layer, product layer, normalized layer, defuzzy layer, and total output layer. The activation levels of the ANFIS and the working of the five layers is given in the following. The ANFIS structure can be described in the following Figure 3.

Figure 3: First Order Takagi–Sugeno Interference System.
Figure 3:

First Order Takagi–Sugeno Interference System.

Figure 2: Structure of the Proposed ANFIS.
Figure 2:

Structure of the Proposed ANFIS.

Layer 1: Fuzzy layer

In this mode, each input layer represents an input variable, and it is transmits into the fuzzification layer. The error voltage (EV) and change in error voltage (CEV) of the nodes are X1, X2, Y1 and Y2, in which X1, X2, Y1 and Y2 are the linguistic labels of the fuzzy theory for dividing the membership functions. The output of the fuzzy layer is given in the following Eqs. (3) and (4):

(3)FL1,i=μXi(a),i=1,2;
(4)FL1,j=μYj(b),j=1,2;

where, FL1,i and FL1,j are the output of the fuzzy layer, and μXi (a) and μYi (b) are the membership functions of the fuzzy layer.

Layer 2: Product layer

This layer may be labeled as the π, which performs logical “and” operation, i.e. the product of the input membership function. In this mode, output is the input weight function of the next nodes, which are represented by W1 and W2. The output of this layer can be described by the following Eq. (5):

(5)Z1=FL2,i=μXi(a)μYi(b),i=1,2;
(6)Z2=FL2,j=μXj(a)μYj(b),j=1,2;

where, Z1 and Z2 are the outputs of the product layer.

Layer 3: Normalized layer

The normalized layer is the third layer, in which each node is fixed and one that represents the IF part of a fuzzy rule. It is used to normalize the input weights, which can perform the fuzzy “and” operation. This layer may be labeled as N, and the output of this layer is given in the following Eqs. (7) and (8):

(7)Z1¯=FL3,i=ZiZ1+Z2,i=1,2;
(8)Z2¯=FL3,j=ZjZ1+Z2,j=1,2;

where Z1¯andZ2¯ are the outputs of the normalized layer.

Layer 4: Defuzzy layer

The defuzzy layer is the adaptive layer, which gives output membership function based on predetermined fuzzy rules. The output of this layer is given in Eqs. (9) and (10):

(9)Z1¯fi=FL4,i=ZiZ1+Z2[A1(EV)+B1(CEV)+C]
(10)Z2¯fj=FL4,j=ZjZ1+Z2[A2(EV)+B2(CEV)+C2]

where A1, A2, B1, B2, C1 and C2 are the linear parameters, Z1¯fi and Z2¯fi are the outputs of the defuzzy layer.

Layer 5: Total output layer

The output layer represents the THEN part of the fuzzy rule. The total of the input signals can be calculated, which is labeled as Σ. The total output of the layer is given in the following Eq. (11):

(11)f=FL5,i=Zl¯fi=Zi¯fiZi

where f is the total output; here, the training of the proposed method training and testing process is explained in the following section.

2.2.1 Harmonic Elimination using ANFIS

In the proposed method, the ANFIS trained with a harmonic problem database register obtained from the multilevel inverter. The training process of the ANFIS system is presented as the order of paired data, i.e. many input data and one output data. Depending upon the measured values, the output values are generated. Here, the input data is the error voltage (EV) and change in error voltage (CEV) Raya et al. [24]. The relation between the reference voltage and the actual output load voltage can be calculated by the following.

[EV1, EV2, EV3 EVn]=[(VoutVref)1,(VoutVref)2,(VoutVref)3(VoutVref)n]

The change in error can be calculated by the following.

[CEV1, CEV2, CEV3 CEVn]=(d(VoutVref)1dt,d(VoutVref)2dt,d(VoutVref)3dt,d(VoutVref)ndt)

The target output data is known by switching angles, which can be generated by the following.

[(EV, CEV)1(EV, CEV)2(EV, CEV)n]=[α11,α21αn1α12,α22αn2α1n,α2nαnn]

where α is the switching angle and which lies between 0 and 90°. The proposed ANFIS can measure the present output voltage and THD range. Depending upon the error voltage, the switching control pulses are generated, which should reduce the THD of the output voltage. It provides the improved power quality due to the elimination of harmonics over the wide range of operating conditions [26]. The proposed method is implemented in the MATLAB platform, and the performance can be analyzed in the following Section 3.

3 Results and Discussion

The proposed technique was implemented in the MATLAB (2012a) working platform, and the effectiveness is determined by comparing the NFC technique. The input supply of the proposed multilevel inverter is 230 V, 50 Hz, modulation index range is 0≤M≤1, switching frequency is 2 KHz, and the design parameters are described in the following Table 1. The MATLAB implementation model of the proposed technique is explained in Figure 4.

Table 1:

Implementation Parameters.

ParametersValues
Load resistance (RL )20 Ω
Reference voltage (Vref)230 V
IGBT resistance (Rsw)0.1 Ω
IGBT diode resistance (RD )0.01 Ω
Figure 4: MATLAB Model of the Proposed Technique.
Figure 4:

MATLAB Model of the Proposed Technique.

First, the maximum time interval used in the proposed technique is T=0.1 s. Initially, the voltage is generated for various intervals with an amplitude of 230 V, which is considered as the reference voltage. The reference voltage waveform is shown in Figure 5. The multilevel inverter load resistance is taken as 20 Ω; without any controller, the output voltage of the multilevel inverter is shown in Figure 6. The peak level is disturbed due to the presence of harmonics. The reference voltage is compared with the output voltage, and the corresponding error is determined. The measured error voltage is described in Figure 7, which lies inside the standard voltage or reference voltage amplitude, i.e. 230 V. The error voltage variation during various time intervals is shown in Figure 8. The harmonic elimination has been attained in the control techniques like NFC and the proposed ANFIS. The multilevel inverter output voltage with NFC is given in Figure 9. The harmonic distortion minimized multilevel inverter output voltage is illustrated in Figure 10. Then, the effectiveness of the proposed technique is analyzed with the use of THD measurement. THD measurement can be done by the five cycles selected from the multilevel inverter output voltage. Figure 11 describes the amount of THD present in the multilevel inverter output voltage without any controller, and the fundamental frequency is also analyzed. THD in the multilevel inverter with the NFC is described in Figure 12. The proposed ANFIS used in the multilevel inverter and the corresponding THD is illustrated in Figure 13. The amount of THD present in the output voltage for different load ranges with various control techniques is given in Table 2.

Figure 5: Reference Voltage Waveform.
Figure 5:

Reference Voltage Waveform.

Figure 6: Seven-Level Inverter Output Voltage without Controller.
Figure 6:

Seven-Level Inverter Output Voltage without Controller.

Figure 7: Difference between Normal Output and Reference Voltage.
Figure 7:

Difference between Normal Output and Reference Voltage.

Figure 8: Change in Error Voltage Graph.
Figure 8:

Change in Error Voltage Graph.

Figure 9: Seven-Level Inverter Output Voltage with NFC.
Figure 9:

Seven-Level Inverter Output Voltage with NFC.

Figure 10: Seven-Level Inverter Output Voltage with ANFIS.
Figure 10:

Seven-Level Inverter Output Voltage with ANFIS.

Figure 11: THD Analysis of Output Voltage without Controller.(A) Selected five cycles of voltage. (B) THD.
Figure 11:

THD Analysis of Output Voltage without Controller.

(A) Selected five cycles of voltage. (B) THD.

Figure 12: THD Analysis of Output Voltage with NFC.(A) Selected five cycles of voltage. (B) THD.
Figure 12:

THD Analysis of Output Voltage with NFC.

(A) Selected five cycles of voltage. (B) THD.

Figure 13: THD Analysis of Output Voltage with ANFIS.(A) Selected five cycles of voltage. (B) THD.
Figure 13:

THD Analysis of Output Voltage with ANFIS.

(A) Selected five cycles of voltage. (B) THD.

Table 2:

Comparison of THD.

TechniquesTHD (%) at different load ratings
10 Ω20 Ω30 Ω40 Ω50 Ω
Without controller13.5713.5713.5713.5713.57
NFC11.7711.7211.7611.7611.58
ANFIS9.169.179.179.189.18

The above graphs show that the effectiveness of the proposed control technique, i.e. harmonic elimination and improve the power quality. First, the difference between harmonic voltage and the reference voltage is determined, which is known by the actual and reference voltages, respectively. Here, the single-phase 230-V sinusoidal waveform is considered as the reference voltage. Also, the error variation among the different time durations is also calculated; it was denoted by a change in error voltage. Then, the corresponding switching angles are generated from the proposed ANFIS controller, and the multilevel inverter output voltage is determined. The effectiveness of the harmonic elimination process is determined by the THD analysis of the multilevel inverter among without controller, NFC and proposed ANFIS. During the THD analysis process, five cycles of multilevel inverter voltage has been selected for every control technique. From the THD analysis, the amount of THD present in the multilevel inverter output voltage without controller is 13.57%. Here, the high THD affecting the multilevel inverter output voltage presents with distortions, and this reduced power quality. By using the NFC control technique in the multilevel inverter, which contains the THD in the output voltage of 11.72%, the amount of THD present in the output voltage is much reduced using the proposed ANFIS controller. THD presents in the multilevel inverter an output voltage with ANFIS controller of 9.17%. Also, the proposed THD percentage is compared with the different techniques like the artificial neural network (ANN), the Newton–Raphson (N-R) method-based switching angle calculation technique, PSO, and NFC. The comparison analysis made by the seven-level inverter with the above-mentioned techniques is described in Table 3. Here, the ANN-based multilevel inverter THD reduction technique shows 14.57% of THD. The N-R method-based switching angle calculation technique reduces the THD at 11.17%. THD elimination of the multilevel inverter using the PSO technique has 15.37% of THD in the output. The comparison results [6, 13, 15, 22, 25, 31] prove the effectiveness of the proposed control technique.

Table 3:

Comparison of THD using Different Techniques.

MethodsTHD (%)
ANN [31]14.57
N-R method-based switching angle calculation technique [13]11.17
PSO [22]15.37
NFC11.77
Proposed method9.16

4 Conclusion

In this paper, we discussed the ANFIS-based harmonic elimination for multilevel inverter, and it is simulated in the MATLAB platform. With the enhanced knowledge rule base, the proposed ANFIS generates switching angles for the appropriate voltage variations. The proposed method performances were compared to the multilevel inverter output voltage THD without controller and with NFC. The simulation results reveal that the proposed ANFIS controller outperforms the NFC. It is also seen that the proposed method has smaller THD under various load conditions. The comparison result shows that the proposed method is the well-enhanced technique to eliminate harmonics, which is competent over the other techniques.

Bibliography

[1] H. A. Attia, M. El-Metwally and O. M. Fahmy, Harmonic distortion effects and mitigation in distribution systems, J. Am. Sci.6 (2010), 173–183.Search in Google Scholar

[2] G. Bhuvaneswari and M. G. Nair, Three-phase hybrid shunt filters for power quality improvement, J. Power Electron.7 (2007), 257–264.Search in Google Scholar

[3] O. Bouhali, M. Berkouk, B. Francois, C. Saudemont and S. Labiod, Solving harmonics elimination problem in three-phase voltage controlled inverter using artificial neural networks, J. Electr. Syst.1 (2005), 39–51.Search in Google Scholar

[4] A. Chitra, T. Meenakshi and J. Asha, Fuzzy logic controller for cascaded H-bridge multilevel inverter, Int. J. Eng. Sci. Technol.3 (2011), 1378–1387.Search in Google Scholar

[5] I. Daut, H. S. Syafruddin, R. Ali, M. Samila and H. Haziah, The effects of harmonic components on transformer losses of sinusoidal source supplying non-linear loads, Am. J. Appl. Sci.3 (2006), 2131–2133.10.3844/ajassp.2006.2131.2133Search in Google Scholar

[6] C. A. L. Espinosa, I. Portocarrero and M. Izquierdo, Minimization of THD and angle calculation for multilevel inverters, Int. J. Eng. Technol.12 (2012), 83–86.Search in Google Scholar

[7] M. George and K. P. Basu, Three-phase shunt active power filter, Am. J. Appl. Sci.5 (2008), 909–916.10.3844/ajassp.2008.909.916Search in Google Scholar

[8] M. George and K. P. Basu, Modeling and control of three-phase shunt active power filter, Am. J. Appl. Sci.5 (2008), 1064–1070.10.3844/ajassp.2008.1064.1070Search in Google Scholar

[9] S. Jeevananthan, Evolutionary computing based area integration PWM technique for multilevel inverters, J. Electr. Syst.3 (2007), 61–72.10.1109/IICPE.2006.4685342Search in Google Scholar

[10] V. Jegathesan and J. Jerome, Non-traditional method-based solution for elimination of lower order harmonics in voltage source inverter feeding an induction motor drive, Serb. J. Electr. Eng.5 (2008), 273–283.10.2298/SJEE0802273VSearch in Google Scholar

[11] M. Kale and E. Ozdemir, Harmonic and reactive power compensation with shunt active power filter under non-ideal mains voltage, Electr. Power Syst. Res.74 (2005) 363–370.10.1016/j.epsr.2004.10.014Search in Google Scholar

[12] S. Kim and P. N. Enjeti, A new hybrid active power filter (APF) topology, IEEE Trans. Power17 (2002), 48–54.10.1109/63.988669Search in Google Scholar

[13] J. Kumar, THD analysis for different levels of cascade multilevel inverters for industrial applications, Int J. Emerg. Technol. Adv. Eng.2 (2012), 237–244.Search in Google Scholar

[14] J. Kumar, B. Das and P. Agarwal, Harmonic reduction technique for a cascade multilevel inverter, Int. J. Recent Trends Eng.1 (2009), 181–185.Search in Google Scholar

[15] G. Laxminarayana and K. Pradeep, Comparative analysis of 3-, 5- and 7-level inverter using space vector PWM, Int. J. Adv. Res. Electr. Electron. Instrum. Eng.2 (2013), 3233–3241.Search in Google Scholar

[16] G. Mahesh, M. Kumar and S. R. Reddy, Simulation and experimental results of 7-level inverter system, Res. J. Appl. Sci. Eng. Technol.3 (2011), 88–95.Search in Google Scholar

[17] T. Manokaran, B. Sakthivel and S. Mohamed Yousuf, Cascaded multilevel inverter based harmonic reduction in STATCOM, Int. J. Eng. Sci. Technol.2 (2010), 5424–5431.Search in Google Scholar

[18] B. Mazari and F. Mekri, Fuzzy hysteresis control and parameter optimization of a shunt active power filter, J. Inf. Sci. Eng.21 (2005), 1139–1156.Search in Google Scholar

[19] G. Murugesan, M. Jagabar Sathik and M. Praveen, A new multilevel inverter topology using less number of switches, Int. J. Eng. Sci. Technol.3 (2011), 1500–1510.Search in Google Scholar

[20] M. E. Ortuzar, R. E. Carmi, J. W. Dixon and L. Moran, Voltage source active power filter based on multilevel converter and ultra capacitor DC link, IEEE Trans. Industr. Electron.53 (2006), 477–485.10.1109/TIE.2006.870656Search in Google Scholar

[21] P. Palanivel and S. S. Dash, Phase shifted carrier pulse width modulation for three phase multilevel inverter to minimize THD and enhance output voltage performance, J. Electr. Syst.6 (2010), 1–13.Search in Google Scholar

[22] N. Prashanth, B. Kumar, J. Yadagiri and A. Dasgupta, Harmonic minimization in multilevel inverters by using PSO, ACEEE Int. J. Control Syst. Instrum.2 (2011), 1–6.Search in Google Scholar

[23] R. N. Raya, D. Chatterjeeb and S. K. Goswamib, An application of PSO technique for harmonic elimination in a PWM inverter, Appl. Soft Comput.9 (2009), 1315–1320.10.1016/j.asoc.2009.05.002Search in Google Scholar

[24] R. N. Raya, D. Chatterjeeb and S. K. Goswamib, A PSO based optimal switching technique for voltage harmonic reduction of multilevel inverter, Exp. Syst. Appl.37 (2010), 7796–7801.10.1016/j.eswa.2010.04.060Search in Google Scholar

[25] Y. Sahali and M. K. Fellah, Application of the optimal minimization of the total harmonic distortion technique to the multilevel symmetrical inverters and study of its performance in comparison with the selective harmonic elimination technique, in: International Symposium on Power Electronics, Electrical Drives, Automation and Motion, May 2006, pp. 1342–1348, Speedam 2006.Search in Google Scholar

[26] Z. Salam, An on-line harmonic elimination pulse width modulation scheme for voltage source inverter, J. Power Electron.10 (2010), 43–50.10.6113/JPE.2010.10.1.043Search in Google Scholar

[27] Z. Salam, J. Aziz and S. S. Ahmed, Digital implementation of a new PWM switching scheme for modular structured multilevel voltage source inverter, J. Energy Environ.5 (2006), 57–76.Search in Google Scholar

[28] R. Salehi, N. Farokhnia, M. Abedi and S. H. Fathi, Elimination of low order harmonics in multilevel inverters using genetic algorithm, J. Power Electron.11 (2011), 132–139.10.6113/JPE.2011.11.2.132Search in Google Scholar

[29] E. C. Sekaran, P. N. Anbalagan and C. Palanisamy, Analysis and simulation of a new shunt active power filter using cascaded multilevel inverter, J. Electr. Eng.58 (2007), 241–249.Search in Google Scholar

[30] R. Seyezhai and B. L. Mathur, Performance evaluation of inverted sine PWM technique for an asymmetric cascaded multilevel inverter, J. Theor. Appl. Inf. Technol.9 (2009), 91–98.Search in Google Scholar

[31] M. Shrivastava, V. Singh and S. Pattnaik, Artificial neural network based harmonic optimization of multilevel inverter to reduce THD, in: Proceedings of the International Conference on Advances in Computer, Electronics and Electrical Engineering, pp. 229–233, 2012.Search in Google Scholar

[32] P. Xiao, G. K. Venayagamoorthy and K. A. Corzine, Seven-level shunt active power filter for high-power drive systems, IEEE Trans. Power Electron.24 (2009), 6–13.10.1109/TPEL.2008.2005897Search in Google Scholar

[33] A. F. Zobaa, Practical solutions for harmonics problems produced in the distribution networks, J. Electr. Syst.2 (2006), 13–28.Search in Google Scholar

Received: 2016-9-19
Published Online: 2017-4-1
Published in Print: 2018-7-26

©2018 Walter de Gruyter GmbH, Berlin/Boston

This article is distributed under the terms of the Creative Commons Attribution Non-Commercial License, which permits unrestricted non-commercial use, distribution, and reproduction in any medium, provided the original work is properly cited.

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