Nov 1, 2014 · : 'A 0.65 ns, 72 kb ECL-CMOS Ram Macro for A 1 Mb SRAM'. 1994 Symp. on VLSI Circuits Digest of Technical Papers, June 1994, pp. 109–110.

A 0.65-ns, 72-kb ecl-cmos ram macro for a 1-mb sram. In IEEE J. Solid-State Circuits, 30(4):491–499, 1995. [4] K. Noda et al. An ultrahigh-density high ...

While an ECL-CMOS SRAM can achieve both ultra high speed and high density, it consumes a lot of power and cannot be applied to low power supply voltage ...

Nambu, et al. 1995 A 0.65ns, 72-kb ECL CMOS. RAM macro for a 1 Mb SRAM., IEEE J. Solid state circuits, Vol. 30, No. 4, 491-499. [13] Amrutur, B. and Horowitz ...

1995: A 0.65-ns, 72-kb ECL-CMOS RAM macro for a 1-Mb SRAM Ieee J. Solid-State Circuits 30(4): 491-499 · Ikeda, S.; Yoshida, Y.; Kamohara, S.; Imato, K ...

72-Mb SRAM a 100nm CMOS-technology violating 1 µm. 2 barrier for the cell ... Hiroalu Nambu, Kazuo Kanetani et.al, ―A 0.65-ns, 72-kb ECL-CMOS RAM Macro for.

... A 0.65-ns, 72-kb ECL-CMOS RAM macro for a 1-Mb SRAM. Nambu H., Kanetani K., Idei Y., Masuda T., Higeta K., Ohayashi M., Usami M., Yamaguchi K., Kikuchi T ...

22. Nambu H., Kanetani K., Idei Y., et al: 'A 0.65 ns, 72 kb ECL-CMOS Ram Macro for A 1 Mb SRAM'. 1994 Symp. on VLSI Circuits Digest of Technical Papers ...

Apr 27, 2014 · ... A 0.65 ns, 72 kb ECL-CMOS. Ram Macro for A 1 Mb SRAM'. 1994 Symp. on VLSI Circuits Digest of Technical Papers, June 1994, pp. 109–110. 23 ...

A 0.65-ns, 72-kb ECL-CMOS RAM macro for a 1-Mb SRAM. Authors: Hiroalu Nambu, Kazuo Kanetani, Youji Idei, Tom Masuda, Keiichi Higeta, Masayuki Ohayashi, ...