Crono: A benchmark suite for multithreaded graph algorithms executing on futuristic multicores M Ahmad, F Hijaz, Q Shi, O Khan 2015 IEEE International Symposium on Workload Characterization, 44-55, 2015 | 139 | 2015 |
A Cross-Layer Multicore Architecture to Tradeoff Program Accuracy and Resilience Overheads Q Shi, H Hoffmann, O Khan IEEE Computer Architecture Letters (CAL) 14 (2), 85-89, 2015 | 34 | 2015 |
A private level-1 cache architecture to exploit the latency and capacity tradeoffs in multicores operating at near-threshold voltages F Hijaz, Q Shi, O Khan 2013 IEEE 31st International Conference on Computer Design (ICCD), 85-92, 2013 | 20 | 2013 |
Exploiting the Tradeoff between Program Accuracy and Soft-error Resiliency Overhead for Machine Learning Workloads Q Shi, H Omar, O Khan Workshop on Silicon Errors in Logic - System Effects (SELSE), 2017 | 14 | 2017 |
Declarative resilience: A holistic soft-error resilient multicore architecture that trades off program accuracy for efficiency H Omar, Q Shi, M Ahmad, H Dogan, O Khan ACM Transactions on Embedded Computing Systems (TECS) 17 (4), 1-27, 2018 | 11 | 2018 |
Toward holistic soft-error-resilient shared-memory multicores Q Shi, O Khan Computer 46 (10), 56-64, 2013 | 10 | 2013 |
Locality-aware data replication in the last-level cache for large scale multicores F Hijaz, Q Shi, G Kurian, S Devadas, O Khan The Journal of Supercomputing 72, 718-752, 2016 | 8 | 2016 |
Towards efficient dynamic data placement in NoC-based multicores Q Shi, F Hijaz, O Khan 2013 IEEE 31st International Conference on Computer Design (ICCD), 369-376, 2013 | 8 | 2013 |
OSPREY: Implementation of Memory Consistency Models for Cache Coherence Protocols involving Invalidation-Free Data Access G Kurian, Q Shi, S Devadas, O Khan Parallel Architecture and Compilation (PACT), 2015 International Conference on, 2015 | 7 | 2015 |
LDAC: Locality-aware data access control for large-scale multicore cache hierarchies Q Shi, G Kurian, F Hijaz, S Devadas, O Khan ACM Transactions on Architecture and Code Optimization (TACO) 13 (4), 1-28, 2016 | 5 | 2016 |
Low-latency mechanisms for near-threshold operation of private caches in shared memory multicores F Hijaz, Q Shi, O Khan 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture …, 2012 | 4 | 2012 |
A lightweight spatio-temporally partitioned multicore architecture for concurrent execution of safety critical workloads Q Shi, K Lakshminarasimhan, C Noll, E Scholte, O Khan Commercial Aviation Cyber Security: Current State and Essential Reading, 63, 2016 | 3 | 2016 |
CSSMT: Compiler Based Software Simultaneous Multithreading (SMT) Y Chen, Q Shi, X Li 2018 26th Euromicro International Conference on Parallel, Distributed and …, 2018 | 1 | 2018 |
Towards Resilient yet Efficient Parallel Execution of Convolutional Neural Networks Q Shi, H Omar, O Khan Boston Area Architecture Workshop (BARC), 2017 | | 2017 |
A Cross-Layer Resilient Multicore Architecture Q Shi | | 2017 |
A Case for Deploying Multicores in Cyber-physical Embedded Systems Q Shi, O Khan Boston Area Architecture Workshop (BARC), 2016 | | 2016 |