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Characterizing 3D Floating Gate NAND Flash

Authors:

Fei Wu,

Yue Zhu,

Ping HuangAuthors Info & Claims

SIGMETRICS '17 Abstracts: Proceedings of the 2017 ACM SIGMETRICS / International Conference on Measurement and Modeling of Computer Systems

Pages 31 - 32

https://doi.org/10.1145/3078505.3078550

Published: 05 June 2017 Publication History

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Abstract

In this paper, we characterize a state-of-the-art 3D floating gate NAND flash memory through comprehensive experiments on an FPGA platform. Then, we present distinct observations on performance and reliability, such as operation latencies and various error patterns. We believe that through our work, novel 3D NAND flash-oriented designs can be developed to achieve better performance and reliability.

References

[1]

Peter Desnoyers. 2013. What systems researchers need to know about NAND flash. In Proc. of HotStorage. USENIX, pages 1--5.

Digital Library

Google Scholar

[2]

Kinam Kim. 2008. Future memory technology: Challenges and opportunities. In Proc. of VLSI-TSA. IEEE, pages 5--9.

Crossref

Google Scholar

[3]

Rino Micheloni. 2016. 3D Flash Memories. Springer.

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Google Scholar

[4]

You Zhou, Fei Wu, and Ping Huang, et al. 2015. An efficient page-level FTL to optimize address translation in flash memory. In Proc. of EuroSys. ACM, pages 1--16.

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Cited By

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Fukami ASheremetov SRegazzoni FGeradts ZDe Laat C(2022)Experimental Evaluation of e.MMC Data RecoveryIEEE Transactions on Information Forensics and Security10.1109/TIFS.2022.317618717(2074-2083)Online publication date: 2022
https://doi.org/10.1109/TIFS.2022.3176187
Li QYe MKuo TXue CShilane PWon Y(2021)How the common retention acceleration method of 3D NAND flash memory goes wrong?Proceedings of the 13th ACM Workshop on Hot Topics in Storage and File Systems10.1145/3465332.3470877(1-7)Online publication date: 27-Jul-2021
https://dl.acm.org/doi/10.1145/3465332.3470877
Liu CLee YChoi WJung MKandemir MDas C(2021)GSSA: A Resource Allocation Scheme Customized for 3D NAND SSDs2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA51647.2021.00043(426-439)Online publication date: Feb-2021
https://doi.org/10.1109/HPCA51647.2021.00043
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Characterizing 3D Floating Gate NAND Flash

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In this paper, we characterize a state-of-the-art 3D floating gate NAND flash memory through comprehensive experiments on an FPGA platform. Then, we present distinct observations on performance and reliability, such as operation latencies and various ...

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Information

Published In

SIGMETRICS '17 Abstracts: Proceedings of the 2017 ACM SIGMETRICS / International Conference on Measurement and Modeling of Computer Systems

June 2017

84 pages

ISBN:9781450350327

DOI:10.1145/3078505

General Chairs:
Bruce Hajek
University of Illinois
,
Sewoong Oh
University of Illinois
,
Program Chairs:
Augustin Chaintreau
Columbia University
,
Leana Golubchik
University of Southern California
,
Zhi-Li Zhang
University of Minnesota

ACM SIGMETRICS Performance Evaluation Review Volume 45, Issue 1
Performance evaluation review
June 2017
70 pages
ISSN:0163-5999
DOI:10.1145/3143314
Editor:
Nidhi Hegde
Bell Labs, Nokia
Issue’s Table of Contents

Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 05 June 2017

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Poster

Funding Sources

National Natural Science Foundation of China
111 Project
Fundamental Research Funds for the Central Universities

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SIGMETRICS '17

Sponsor:

SIGMETRICS

SIGMETRICS '17: ACM SIGMETRICS / International Conference on Measurement and Modeling of Computer Systems

June 5 - 9, 2017

Illinois, Urbana-Champaign, USA

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SIGMETRICS '17 Abstracts Paper Acceptance Rate 27 of 76 submissions, 36%;

Overall Acceptance Rate 459 of 2,691 submissions, 17%

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Cited By

View all

Fukami ASheremetov SRegazzoni FGeradts ZDe Laat C(2022)Experimental Evaluation of e.MMC Data RecoveryIEEE Transactions on Information Forensics and Security10.1109/TIFS.2022.317618717(2074-2083)Online publication date: 2022
https://doi.org/10.1109/TIFS.2022.3176187
Li QYe MKuo TXue CShilane PWon Y(2021)How the common retention acceleration method of 3D NAND flash memory goes wrong?Proceedings of the 13th ACM Workshop on Hot Topics in Storage and File Systems10.1145/3465332.3470877(1-7)Online publication date: 27-Jul-2021
https://dl.acm.org/doi/10.1145/3465332.3470877
Liu CLee YChoi WJung MKandemir MDas C(2021)GSSA: A Resource Allocation Scheme Customized for 3D NAND SSDs2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA51647.2021.00043(426-439)Online publication date: Feb-2021
https://doi.org/10.1109/HPCA51647.2021.00043
Wu FZhang MDu YLiu WLu ZWan JTan ZXie C(2020)Using Error Modes Aware LDPC to Improve Decoding Performance of 3-D TLC NAND FlashIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.289770639:4(909-921)Online publication date: Apr-2020
https://doi.org/10.1109/TCAD.2019.2897706
Li QYe MCui YShi LLi XKuo TXue C(2020)Shaving Retries with Sentinels for Fast Read over High-Density 3D Flash2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)10.1109/MICRO50266.2020.00048(483-495)Online publication date: Oct-2020
https://doi.org/10.1109/MICRO50266.2020.00048
Li QYe MCui YShi LLi XXue CYadgar GNoh S(2019)Sentinel cells enabled fast read for NAND flashProceedings of the 11th USENIX Conference on Hot Topics in Storage and File Systems10.5555/3357062.3357090(21-21)Online publication date: 8-Jul-2019
https://dl.acm.org/doi/10.5555/3357062.3357090
Verschoren RHoudt B(2019)On the Endurance of the d-Choices Garbage Collection Algorithm for Flash-Based SSDsACM Transactions on Modeling and Performance Evaluation of Computing Systems10.1145/33261214:3(1-23)Online publication date: 2-Jul-2019
https://dl.acm.org/doi/10.1145/3326121
Liu CKotra JJung MKandemir MDas CBahar IHerlihy MWitchel ELebeck A(2019)SOML ReadProceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems10.1145/3297858.3304035(955-969)Online publication date: 4-Apr-2019
https://dl.acm.org/doi/10.1145/3297858.3304035
Papandreou NIoannou NParnell TPletka RStanisavljevic MStoica RTomic SPozidis H(2019)Reliability of 3D NAND flash memory with a focus on read voltage calibration from a system aspect2019 19th Non-Volatile Memory Technology Symposium (NVMTS)10.1109/NVMTS47818.2019.8986221(1-4)Online publication date: Oct-2019
https://doi.org/10.1109/NVMTS47818.2019.8986221
Papandreou NPozidis HParnell TIoannou NPletka RTomic SBreen PTressler GFry AFisher T(2019)Characterization and Analysis of Bit Errors in 3D TLC NAND Flash Memory2019 IEEE International Reliability Physics Symposium (IRPS)10.1109/IRPS.2019.8720454(1-6)Online publication date: Mar-2019
https://doi.org/10.1109/IRPS.2019.8720454
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Characterizing 3D Floating Gate NAND Flash: Observations, Analyses, and Implications

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