Nothing Special   »   [go: up one dir, main page]

skip to main content
10.1145/3036669.3038242acmconferencesArticle/Chapter ViewAbstractPublication PagesispdConference Proceedingsconference-collections
research-article

Challenges and Opportunities: From Near-memory Computing to In-memory Computing

Published: 19 March 2017 Publication History

Abstract

The confluence of the recent advances in technology and the ever-growing demand for large-scale data analytics created a renewed interest in a decades-old concept, processing-in-memory (PIM). PIM, in general, may cover a very wide spectrum of compute capabilities embedded in close proximity to or even inside the memory array. In this paper, we present an initial taxonomy for dividing PIM into two broad categories: 1) Near-memory processing and 2) In-memory processing. This paper highlights some interesting work in each category and provides insights into the challenges and possible future directions.

References

[1]
Ling Liu. Computing infrastructure for big data processing. volume 7, pages 165--170, 2013.
[2]
Wm. A. Wulf and Sally A. McKee. Hitting the memory wall: Implications of the obvious. SIGARCH Comput. Archit. News, 23(1):20--24, March 1995.
[3]
T. Kuroda. Low-power, high-speed cmos vlsi design. pages 310--315, 2002.
[4]
Peter M. Kogge. Execube-a new architecture for scaleable mpps. In Proceedings of the 1994 International Conference on Parallel Processing - Volume 01, ICPP '94, pages 77--84. IEEE Computer Society, 1994.
[5]
David Patterson, Thomas Anderson, et al. A case for intelligent ram. IEEE Micro, 17(2):34--44, March 1997.
[6]
D. Patterson, T. Anderson, et al. Intelligent ram (iram): chips that remember and compute. In 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers, pages 224--225, Feb 1997.
[7]
Mary Hall, Peter Kogge, et al. Mapping irregular applications to diva, a pim-based data-intensive architecture. In Proceedings of the 1999 ACM/IEEE Conference on Supercomputing, SC '99. ACM, 1999.
[8]
J. Torrellas. Flexram: Toward an advanced intelligent memory system: A retrospective paper. In 2012 IEEE 30th International Conference on Computer Design (ICCD), pages 3--4, Sept 2012.
[9]
D. G. Elliott, M. Stumm, et al. Computational ram: implementing processors in memory. IEEE Design Test of Computers, 16(1):32--41, Jan 1999.
[10]
K. Mai, T. Paaske, et al. Smart memories: a modular reconfigurable architecture. In Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat. No.RS00201), pages 161--171, June 2000.
[11]
M. G. Farooq, T. L. Graves-Abe, et al. 3d copper tsv integration, testing and reliability. In 2011 International Electron Devices Meeting, pages 7.1.1--7.1.4, Dec 2011.
[12]
Y. Liu, W. Luk, et al. A compact low-power 3d i/o in 45nm cmos. In 2012 IEEE International Solid-State Circuits Conference, pages 142--144, Feb 2012.
[13]
Antonis Papanikolaou, Dimitrios Soudris, et al. Three Dimensional System Integration: IC Stacking Process and Design. Springer Publishing Company, Incorporated, 1st edition, 2010.
[14]
R. Balasubramonian, J. Chang, et al. Near-data processing: Insights from a micro-46 workshop. IEEE Micro, 34(4):36--42, July 2014.
[15]
Seth H Pugsley, Jeffrey Jestes, et al. Ndc: Analyzing the impact of 3d-stacked memory logic devices on mapreduce workloads. In Performance Analysis of Systems and Software (ISPASS), 2014 IEEE International Symposium on, pages 190--200. IEEE, 2014.
[16]
M. Wordeman, J. Silberman, et al. A 3d system prototype of an edram cache stacked over processor-like logic using through-silicon vias. In 2012 IEEE International Solid-State Circuits Conference, pages 186--187, Feb 2012.
[17]
Q. Zhu, B. Akin, et al. A 3d-stacked logic-in-memory accelerator for application-specific data intensive computing. In 2013 IEEE International 3D Systems Integration Conference (3DIC), pages 1--7, Oct 2013.
[18]
Q. Zhu, T. Graf, et al. Accelerating sparse matrix-matrix multiplication with 3d-stacked logic-in-memory hardware. In 2013 IEEE High Performance Extreme Computing Conference (HPEC), pages 1--6, Sept 2013.
[19]
V. Seshadri, K. Hsieh, et al. Fast bulk bitwise and and or in dram. IEEE Computer Architecture Letters, 14(2):127--131, July 2015.
[20]
Vivek Seshadri, Yoongu Kim, et al. Rowclone: Fast and energy-efficient in-dram bulk data copy and initialization. In Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-46, pages 185--197. ACM, 2013.
[21]
J Thomas Pawlowski. Hybrid memory cube (hmc). In IEEE Hot Chips, 2011.
[22]
D. U. Lee, K. W. Kim, et al. 25.2 a 1.2v 8gb 8-channel 128gb/s high-bandwidth memory (hbm) stacked dram with effective microbump i/o test methods using 29nm process and tsv. In 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), pages 432--433, Feb 2014.
[23]
M. J. Miller. Bandwidth engine 2; serial memory chip breaks 2 billion accesses/sec. In 2011 IEEE Hot Chips 23 Symposium (HCS), pages 1--23, Aug 2011.
[24]
Weisheng Zhao et al. Spin transfer torque (stt)-mram-based runtime reconfiguration fpga circuit. TECS, 9(2):14, 2009.
[25]
Benjamin C Lee et al. Architecting phase change memory as a scalable dram alternative. In ACM SIGARCH Computer Architecture News, volume 37, pages 2--13. ACM, 2009.
[26]
H-S Philip Wong et al. Metal--oxide rram. Proceedings of the IEEE, 100(6):1951--1970, 2012.
[27]
C. Villa, D. Mills, et al. A 45nm 1gb 1.8v phase-change memory. In 2010 IEEE International Solid-State Circuits Conference - (ISSCC), pages 270--271, Feb 2010.
[28]
Y. Choi, I. Song, et al. A 20nm 1.8v 8gb pram with 40mb/s program bandwidth. In 2012 IEEE International Solid-State Circuits Conference, pages 46--48, Feb 2012.
[29]
T. Y. Liu, T. H. Yan, et al. A 130.7mm2 2-layer 32gb reram memory device in 24nm technology. In 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers, pages 210--211, Feb 2013.
[30]
M. Adams. 2015 winter analyst conference, 2 2015. Micron Technology, Inc.
[31]
Micron Technology, Inc. Breakthrough Nonvolatile Memory Technology. http://www.micron.com/about/innovations/3d-xpoint-technology. Accessed: 2015--10--30.
[32]
Natalie Enright Jerger, Li-Shiuan Peh, et al. Virtual circuit tree multicasting: A case for on-chip hardware multicast support. volume 36, pages 229--240. ACM, June 2008.
[33]
G. Khodabandehloo, M. Mirhassani, et al. Analog implementation of a novel resistive-type sigmoidal neuron. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 20(4):750--754, April 2012.
[34]
Yu Wang, Tianqi Tang, et al. Energy efficient rram spiking neural network for real time classification. In Proceedings of the 25th Edition on Great Lakes Symposium on VLSI, GLSVLSI '15, pages 189--194. ACM, 2015.
[35]
Chenchen Liu, Bonan Yan, et al. A spiking neuromorphic design with resistive crossbar. In Proceedings of the 52Nd Annual Design Automation Conference, DAC '15, pages 14:1--14:6. ACM, 2015.
[36]
Qing Guo, Xiaochen Guo, et al. A resistive tcam accelerator for data-intensive computing. In Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-44, pages 339--350. ACM, 2011.
[37]
Qing Guo, Xiaochen Guo, et al. Ac-dimm: associative computing with stt-mram. In ACM SIGARCH Computer Architecture News, volume 41, pages 189--200. ACM, 2013.
[38]
L. Yavits, S. Kvatinsky, et al. Resistive associative processor. IEEE Computer Architecture Letters, 14(2):148--151, July 2015.
[39]
Y. Tsuji, X. Bai, et al. A 2x logic density programmable logic array using atom switch fully implemented with logic transistors at 40nm-node and beyond. In 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits), pages 1--2, June 2016.
[40]
Jason Cong and Bingjun Xiao. Fpga-rpi: A novel fpga architecture with rram-based programmable interconnects. IEEE Trans. Very Large Scale Integr. Syst., 22(4):864--877, April 2014.
[41]
Yue Zha and Jing Li. Reconfigurable in-memory computing with resistive memory crossbar. In Proceedings of the 35th International Conference on Computer-Aided Design, page 120. ACM, 2016.
[42]
M. J. Lee, C. B. Lee, et al. Stack friendly all-oxide 3d rram using gainzno peripheral tft realized over glass substrates. In 2008 IEEE International Electron Devices Meeting, pages 1--4, Dec 2008.
[43]
S. H. Jo, T. Kumar, et al. Cross-point resistive ram based on field-assisted superlinear threshold selector. IEEE Transactions on Electron Devices, 62(11):3477--3481, Nov 2015.
[44]
J. Zhou, K. H. Kim, et al. Crossbar rram arrays: Selector device requirements during read operation. IEEE Transactions on Electron Devices, 61(5):1369--1376, May 2014.
[45]
S. H. Jo, T. Kumar, et al. Self-limited rram with on/off resistance ratio amplification. In 2015 Symposium on VLSI Technology (VLSI Technology), pages T128--T129, June 2015.
[46]
J. Li, R. K. Montoye, et al. 1 mb 0.41 um2 2t-2r cell nonvolatile tcam with two-bit encoding and clocked self-referenced sensing. IEEE Journal of Solid-State Circuits, 49(4):896--907, April 2014.

Cited By

View all
  • (2024)Microstructure Features and Mechanical Properties of Casted CoFeB Alloy TargetCoatings10.3390/coatings1403025514:3(255)Online publication date: 21-Feb-2024
  • (2024)Approx-IMC: A general-purpose approximate digital in-memory computing framework based on STT-MRAMFuture Generation Computer Systems10.1016/j.future.2024.05.053160(40-53)Online publication date: Nov-2024
  • (2024)In-memory computing: characteristics, spintronics, and neural network applications insightsMultiscale and Multidisciplinary Modeling, Experiments and Design10.1007/s41939-024-00517-07:6(5005-5029)Online publication date: 9-Jul-2024
  • Show More Cited By

Index Terms

  1. Challenges and Opportunities: From Near-memory Computing to In-memory Computing

        Recommendations

        Comments

        Please enable JavaScript to view thecomments powered by Disqus.

        Information & Contributors

        Information

        Published In

        cover image ACM Conferences
        ISPD '17: Proceedings of the 2017 ACM on International Symposium on Physical Design
        March 2017
        176 pages
        ISBN:9781450346962
        DOI:10.1145/3036669
        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

        Sponsors

        Publisher

        Association for Computing Machinery

        New York, NY, United States

        Publication History

        Published: 19 March 2017

        Permissions

        Request permissions for this article.

        Check for updates

        Author Tags

        1. 3d integration
        2. in-memory processing
        3. near-memory processing
        4. nonvolatile memory

        Qualifiers

        • Research-article

        Conference

        ISPD '17
        Sponsor:
        ISPD '17: International Symposium on Physical Design
        March 19 - 22, 2017
        Oregon, Portland, USA

        Acceptance Rates

        Overall Acceptance Rate 62 of 172 submissions, 36%

        Upcoming Conference

        ISPD '25
        International Symposium on Physical Design
        March 16 - 19, 2025
        Austin , TX , USA

        Contributors

        Other Metrics

        Bibliometrics & Citations

        Bibliometrics

        Article Metrics

        • Downloads (Last 12 months)283
        • Downloads (Last 6 weeks)24
        Reflects downloads up to 09 Nov 2024

        Other Metrics

        Citations

        Cited By

        View all
        • (2024)Microstructure Features and Mechanical Properties of Casted CoFeB Alloy TargetCoatings10.3390/coatings1403025514:3(255)Online publication date: 21-Feb-2024
        • (2024)Approx-IMC: A general-purpose approximate digital in-memory computing framework based on STT-MRAMFuture Generation Computer Systems10.1016/j.future.2024.05.053160(40-53)Online publication date: Nov-2024
        • (2024)In-memory computing: characteristics, spintronics, and neural network applications insightsMultiscale and Multidisciplinary Modeling, Experiments and Design10.1007/s41939-024-00517-07:6(5005-5029)Online publication date: 9-Jul-2024
        • (2023)IMPLY-Based High-Speed Conditional Carry and Carry Select Adders for In-Memory ComputingIEEE Transactions on Nanotechnology10.1109/TNANO.2023.328484522(280-290)Online publication date: 2023
        • (2023)A Survey of MRAM-Centric Computing: From Near Memory to In MemoryIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2022.321483311:2(318-330)Online publication date: 1-Apr-2023
        • (2023)Dynamic Partitioning Method for Near-Memory Parallel Processing of Sparse Matrix-Vector MultiplicationIECON 2023- 49th Annual Conference of the IEEE Industrial Electronics Society10.1109/IECON51785.2023.10312058(1-6)Online publication date: 16-Oct-2023
        • (2023)Flash-based Computing-in-memory Architectures with High-accuracy and Robust Reliabilities for General-purpose Applications2023 IEEE 15th International Conference on ASIC (ASICON)10.1109/ASICON58565.2023.10396276(1-4)Online publication date: 24-Oct-2023
        • (2023)Reconfigurable Logic-in-Memory Computing Based on a Polarity-Controllable Two-Dimensional TransistorNano Letters10.1021/acs.nanolett.3c0124823:11(5242-5249)Online publication date: 26-May-2023
        • (2022)DSIM: Distributed Sequence Matching on Near-DRAM Accelerator for Genome AssemblyIEEE Journal on Emerging and Selected Topics in Circuits and Systems10.1109/JETCAS.2022.317277412:2(486-499)Online publication date: Jun-2022
        • (2022)Design of In-Memory Computing Enabled SRAM Macro2022 IEEE 19th India Council International Conference (INDICON)10.1109/INDICON56171.2022.10039958(1-4)Online publication date: 24-Nov-2022
        • Show More Cited By

        View Options

        Get Access

        Login options

        View options

        PDF

        View or Download as a PDF file.

        PDF

        eReader

        View online with eReader.

        eReader

        Media

        Figures

        Other

        Tables

        Share

        Share

        Share this Publication link

        Share on social media