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Ferroelectric Transistor based Non-Volatile Flip-Flop

Published: 08 August 2016 Publication History

Abstract

We present a non-volatile flip-flop with a feature to back-up the state in a ferroelectric transistor (FEFET) during power failure or supply gating. The data is stored in the form of polarization of the ferroelectric (FE) layer in the gate stack of the FEFET. The proposed flip-flop utilizes the non-volatility of the three-terminal FEFET to optimize the data backup and restore operations. We perform an extensive device-circuit analysis to provide insights into the design of the proposed flip-flop. We discuss the optimization of the FE thickness in the gate stack of the FEFET to introduce suitable non-volatility and present the implications at the circuit level. Our analysis shows that by virtue of the three terminal structure of the FEFET and the order of magnitude difference in the current for the two polarization states, the design of the backup/restore module is considerably simplified. Compared to a FE capacitor based non-volatile flip-flop, the proposed flip-flop achieves 40%--50% smaller backup delay, 27%--40% lower backup energy, comparable restore delay and up to an order of magnitude lower restore energy. While the FE capacitor based design leads to 76% area penalty compared to a conventional (volatile) flip-flop, the proposed design incurs only 35% area overhead.

References

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cover image ACM Conferences
ISLPED '16: Proceedings of the 2016 International Symposium on Low Power Electronics and Design
August 2016
392 pages
ISBN:9781450341851
DOI:10.1145/2934583
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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New York, NY, United States

Publication History

Published: 08 August 2016

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Author Tags

  1. Data backup
  2. Data restore
  3. Ferroelectric transistor
  4. Hysteresis
  5. Non-volatile flip-flop
  6. Non-volatility

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  • Research-article
  • Research
  • Refereed limited

Funding Sources

  • Semiconductor Research Corporation (Global Research Collaboration)

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ISLPED '16
Sponsor:
ISLPED '16: International Symposium on Low Power Electronics and Design
August 8 - 10, 2016
CA, San Francisco Airport, USA

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ISLPED '16 Paper Acceptance Rate 60 of 190 submissions, 32%;
Overall Acceptance Rate 398 of 1,159 submissions, 34%

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Cited By

View all
  • (2024)2D Ferroelectrics and ferroelectrics with 2D: Materials and device prospectsCurrent Opinion in Solid State and Materials Science10.1016/j.cossms.2024.10117832(101178)Online publication date: Sep-2024
  • (2024)Emerging Technologies for Memory-Centric ComputingDesign and Applications of Emerging Computer Systems10.1007/978-3-031-42478-6_1(3-29)Online publication date: 14-Jan-2024
  • (2023)SBCT-NoC: Ultra Low-Power and Reliable Simultaneous Bi-Directional Current-Mode Transceiver for Network-on-Chip InterconnectsIEEE Transactions on Nanotechnology10.1109/TNANO.2022.320531722(777-784)Online publication date: 2023
  • (2023)FeCrypto: Instruction Set Architecture for Cryptographic Algorithms Based on FeFET-Based In-Memory ComputingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.323373642:9(2889-2902)Online publication date: Sep-2023
  • (2023)Wurtzite and fluorite ferroelectric materials for electronic memoryNature Nanotechnology10.1038/s41565-023-01361-y18:5(422-441)Online publication date: 27-Apr-2023
  • (2022)Computing-in-memory circuits and cross-layer integrated design and optimization: from SRAM to FeFETSCIENTIA SINICA Informationis10.1360/SSI-2021-042052:4(612)Online publication date: 29-Mar-2022
  • (2022)Exploring the Design of Energy-Efficient Intermittently Powered Systems Using Reconfigurable Ferroelectric TransistorsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2021.312524830:4(365-378)Online publication date: Apr-2022
  • (2022)Re-FeMAT: A Reconfigurable Multifunctional FeFET-Based Memory ArchitectureIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2021.314019441:11(5071-5084)Online publication date: Nov-2022
  • (2022)A ReRAM-based Nonvolatile FPGA2022 IEEE 20th Student Conference on Research and Development (SCOReD)10.1109/SCOReD57082.2022.9973999(62-67)Online publication date: 8-Nov-2022
  • (2022)On the Reliability of Computing-in-Memory Accelerators for Deep Neural NetworksSystem Dependability and Analytics10.1007/978-3-031-02063-6_9(167-190)Online publication date: 26-Jul-2022
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