Publication IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer SciencesVol.E98-ANo.2pp.749-753 Publication Date: 2015/02/01 Online ISSN: 1745-1337 DOI: 10.1587/transfun.E98.A.749 Type of Manuscript: LETTER Category: Systems and Control Keyword: system modeling, CPPLL, clock synchronization, power packet,
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Summary: In this letter, we establish a model of a digital clock synchronization method for power packet dispatching. The first-order control is carried out to a specified model to achieve the clock synchronization. From the experimental results, it is confirmed that power packets were recognized under autonomous synchronization.