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Analysis and Testing of Bridging Faults in CMOS Synchronous Sequential Circuits Yukiya MIURA Publication IEICE TRANSACTIONS on Information and Systems Vol.E87-D No.3 pp.564-570 Publication Date: 2004/03/01 Online ISSN: DOI: Print ISSN: 0916-8532 Type of Manuscript: Special Section PAPER (Special Section on Test and Verification of VLSI) Category: Fault Detection Keyword: bridging faults, CMOS synchronous sequential circuits, fault analysis, testing, Full Text: PDF(796.9KB)>>
Summary: In this paper, we analyze behaviors of bridging faults in CMOS synchronous sequential circuits based on transient analysis. From analysis results, we expose dynamic and analog behaviors of the circuit caused by the bridging faults, which are oscillation, asynchronous sequential behavior, IDDT failure and IDDQ failure as well as logic error. In order to detect this kind of fault, we show that not only IDDQ testing but also IDDT testing and logic testing which guarantees correct state transitions are required. | ||||||||||
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