Wafer-scale integration has been demonstrated by fabricating a digital integrator on a
monolithic 20-cm/sup 2/ silicon chip, the first laser-restructured digital logic system. Large-area …

… Mathur, AM Soares, and PW Wyatt, "A Wafer-Scale Digital Integrator Using Restructurable
VLSI", Submitted to IEEE Joint Special Issue on VLSI, Feb. 1985; Raffel, JI, AH Anderson, GH …

Restructurable VLSI (RVLSI) is an approach to wafer-scale integration which has been
demonstrated by building six different monolithic silicon, wafer-scale chips for signal processing …

The ever-increasing size and complexity of integrated circuit devices seems to leadinevitably
to the ultimate “chip”, occupying the area of a whole wafer. This concept, which has been …

The wafer-scale 170000-gate fast Fourier transform (FFT) processor has three features: a
single repeatable building block containing a processing element (PE) and its interconnects, …

With the advent of specialized VLSI and WSI hardware components the finite difference
algorithms for solving differential equations become more attractive. This paper presents a novel …

A description is given of research on a WSI FFT processor. Attention is focused on the design
methodology, architecture, and sparing strategy and restructuring. The basic cells utilized …

Restructurable VLSI wafer-scale circuits have been built using two methods, both using laser
energy to create low resistance connections between bus lines on already existing circuits. …

MOS fabrication sequence [1],[2]. A new “diode-link’’has been developed that can be
manufactured as part of a normal CMOS process. This structure consists of two diodes formed by …