Article

System Design Using Kahn Process Networks: The Compaan/Laura Approach

Authors:

Todor Stefanov,

Claudiu Zissulescu,

Alexandru Turjan,

Ed DeprettereAuthors Info & Claims

DATE '04: Proceedings of the conference on Design, automation and test in Europe - Volume 1

Page 10340

Published: 16 February 2004 Publication History

Abstract

New emerging embedded system platforms in the realm of high-throughput multimedia, imaging, and signal processing will consist of multiple microprocessors and reconfigurable components. One of the major problems is how to program these platforms in a systematic and automated way so as to satisfy the performance need of applications executed on these platforms.In this paper, we present our system design approach as an efficient solution to this programming problem. We show how for an application written in Matlab, a Kahn Process Network specification can automatically be derived and systematically mapped onto a target platform composed of a microprocessor and an FPGA. Furthermore, we illustrate how the mapping approach is applied on a real-life example, namely an M-JPEG encoder.

References

[1]

{1} Gilles Kahn, "The Semantics of a Simple Language for Parallel Programming," in Proc. of the IFIP Congress 74. 1974, North-Holland Publishing Co.

[2]

{2} Edward A. Lee and Thomas M. Parks, "Dataflow process networks," Proceedings of the IEEE, vol. 83, no. 5, pp. 773-799, May 1995.

[3]

{3} Bart Kienhuis, Edwin Rijpkema, and Ed F. Deprettere, "Compaan: Deriving Process Networks from Matlab for Embedded Signal Processing Architectures," in Proc. 8th International Workshop on Hardware/Software Codesign (CODES'2000), San Diego, CA, USA, May 3-5 2000.

Digital Library

[4]

{4} Alexandru Turjan and Bart Kienhuis, "Storage management in process networks using the lexicographically maximal preimage," in Proceedings of the IEEE 14th Int. Conf. on Application-specific Systems, Architectures and Processors (ASAP'03), The Hague, The Netherlands, June 24-26 2003.

[5]

{5} Alexandru Turjan, Bart Kienhuis, and Ed Deprettere, "A technique to determine inter-process communication in the polyhedral model," in In Proceedings of the 10th International Workshop on Compilers for Parallel Computers, (CPC 2003), Amsterdam, The Netherlands, January 2003.

[6]

{6} Claudiu Zissulescu, Todor Stefanov, Bart Kienhuis, and Ed Deprettere, "LAURA: Leiden Architecture Research and Exploration Tool," in Proc. 13th Int. Conference on Field Programmable Logic and Applications (FPL'03), 2003.

[7]

{7} Wayne Wolf, "A Decade of Hardware/Software Codesign," IEEE Computer, vol. 36, no. 4, pp. 35-43, Apr. 2003.

Digital Library

[8]

{8} Y. Li, T. Callahan, E. Dernell, R. Harr, U. Kurkure, and J. Stockwood, "Hardware-Software Co-Design of Embedded Reconfigurable Architectures," in Proc. 37th Design Automation Conference (DAC'00), Los Angeles, CA, June 5-9 2000, pp. 507-512.

Digital Library

[9]

{9} Timothy Callahan, John Hauser, and John Wawrzynek, "The Garp Architecture and C Compiler," IEEE Computer, pp. 62-69, April 2000.

Digital Library

[10]

{10} J. Villarreal, G. Suresh, G. Stitt, F. Vahid, and W. Najjar, "Improving Software Performance with Configurable Logic," Kluwer Journal on Design Automation of Embedded Systems, vol. 7, no. 4, pp. 325- 339, Nov. 2002.

Digital Library

[11]

{11} Vinod Kathail, Shail Aditya, Robert Schreiber, and Bob Rau, "PICO: Automatically Designing Custom Computers," IEEE Computer, vol. 35, no. 9, Sept. 2002.

Digital Library

[12]

{12} M. Gokhale, J. Stone, J. Arnold, and M. Kalinowski, "Stream-Oriented FPGA Computing in the Stream-C High Level Language," in Proc. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'00), April 2000.

Digital Library

[13]

{13} C. A. R. Hoare, Communicating Sequential Processes, Prentice-Hall, 1985.

Digital Library

[14]

{14} Eric Verhulst, "Beyond the Von Neumann Machine: Communication as the driving design paradigm for MP-SoC from software to hardware," in Networks on Chips, Axel Jantsch and Hannu Tenhunen, Eds., pp. 217-238. Kluwer Academic Publishers, 2003.

Digital Library

[15]

{15} Eylon Gaspi et al., "Stream Computations Organized for Reconfigurable Execution (SCORE)," in Proc. 10th Int. Conference on Field Programmable Logic and Applications (FPL'00), Aug. 28-30 2000.

Digital Library

[16]

{16} Vasudev Bhaskaran and Konstantinos Konstantinides, Image and Video Compression Standards; Algorithms and Architectures, Kluwer Academic Publishers, 1995.

Digital Library

[17]

{17} W. B. Pennebacker, J. L. Mitchel, C. E. Fogg, and D. J. LeGall, MPEG Video Compression Standard, Chapman and Hall, 1996.

Digital Library

[18]

{18} "http://www.alpha-data.com/adm-xrc-ii.html," Alpha Data Parallel Systems, Ltd.

[19]

{19} E. A. de Kock et al., "YAPI: Application modeling for signal processing systems," in Proc. 37th Design Automation Conference (DAC'2000), Los Angeles, CA, June 5-9 2000, pp. 402-405.

Digital Library

[20]

{20} "PVRG-JPEG CODEC 1.1," Portable Video Research Group, Stanford University.

[21]

{21} "www.synplicity.com/products/synplifypro/index.html," Synplicity, Inc.

[22]

{22} "http://www.xilinx.com/ise/design_tools/index.htm," Xilinx, Inc.

[23]

{23} Paul Lieverse, Todor Stefanov, Pieter van der Wolf, and Ed Deprettere, "System Level Design with SPADE: an M-JPEG Case Study," in Proc. Int. Conference on Computer Aided Design (ICCAD'01), San Jose CA, USA, Nov. 4-8 2001, pp. 31-38.

Digital Library

[24]

{24} Todor Stefanov, Bart Kienhuis, and Ed Deprettere, "Algorithmic Transformation Techniques for Efficient Exploration of Alternative Application Instances," in Proc. 10th Int. Symposium on Hardware/Software Codesign (CODES'02), Estes Park CO, USA, May 6-8 2002, pp. 7-12.

Digital Library

Cited By

Onnebrink GHallawa ALeupers RAscheid GShaheen AShibuya T(2019)A heuristic for multi objective software application mappings on heterogeneous MPSoCsProceedings of the 24th Asia and South Pacific Design Automation Conference10.1145/3287624.3287651(609-614)Online publication date: 21-Jan-2019
https://dl.acm.org/doi/10.1145/3287624.3287651
Ohkawa TYamashina KMatsumoto TOotsu KYokota TKent KYoo S(2016)Architecture exploration of intelligent robot system using ROS-compliant FPGA componentProceedings of the 27th International Symposium on Rapid System Prototyping: Shortening the Path from Specification to Prototype10.1145/2990299.2990312(72-78)Online publication date: 1-Oct-2016
https://dl.acm.org/doi/10.1145/2990299.2990312
van Teijlingen Wvan Leuken RGaluzzi CKienhuis B(2016)Determining Performance Boundaries on High-Level System SpecificationsProceedings of the 19th International Workshop on Software and Compilers for Embedded Systems10.1145/2906363.2906386(90-97)Online publication date: 23-May-2016
https://dl.acm.org/doi/10.1145/2906363.2906386
Show More Cited By

Index Terms

System Design Using Kahn Process Networks: The Compaan/Laura Approach
1. Computer systems organization
  1. Embedded and cyber-physical systems
  2. Real-time systems
2. Hardware

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Published In

cover image ACM Conferences

DATE '04: Proceedings of the conference on Design, automation and test in Europe - Volume 1

February 2004

688 pages

ISBN:0769520855

Copyright © Copyright (c) 2004 Institute of Electrical and Electronics Engineers, Inc. All rights reserved.

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SIGDA: ACM Special Interest Group on Design Automation

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IEEE Computer Society

United States

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Published: 16 February 2004

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DATE04: Design, Automation and Test in Europe 2004

February 16 - 20, 2004

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Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Cited By

Onnebrink GHallawa ALeupers RAscheid GShaheen AShibuya T(2019)A heuristic for multi objective software application mappings on heterogeneous MPSoCsProceedings of the 24th Asia and South Pacific Design Automation Conference10.1145/3287624.3287651(609-614)Online publication date: 21-Jan-2019
https://dl.acm.org/doi/10.1145/3287624.3287651
Ohkawa TYamashina KMatsumoto TOotsu KYokota TKent KYoo S(2016)Architecture exploration of intelligent robot system using ROS-compliant FPGA componentProceedings of the 27th International Symposium on Rapid System Prototyping: Shortening the Path from Specification to Prototype10.1145/2990299.2990312(72-78)Online publication date: 1-Oct-2016
https://dl.acm.org/doi/10.1145/2990299.2990312
van Teijlingen Wvan Leuken RGaluzzi CKienhuis B(2016)Determining Performance Boundaries on High-Level System SpecificationsProceedings of the 19th International Workshop on Software and Compilers for Embedded Systems10.1145/2906363.2906386(90-97)Online publication date: 23-May-2016
https://dl.acm.org/doi/10.1145/2906363.2906386
Rafique OSchneider K(2016)Introducing MoC Drivers for the Integration of Sensor-Actuator Behaviors in Model-Based Design Flows of Embedded SystemsProceedings of the 19th International Workshop on Software and Compilers for Embedded Systems10.1145/2906363.2906368(50-59)Online publication date: 23-May-2016
https://dl.acm.org/doi/10.1145/2906363.2906368
Zhu QDeng PSze CDavoodi A(2014)Design synthesis and optimization for automotive embedded systemsProceedings of the 2014 on International symposium on physical design10.1145/2560519.2565873(141-148)Online publication date: 30-Mar-2014
https://dl.acm.org/doi/10.1145/2560519.2565873
Nadezhkin DNikolov HStefanov T(2013)Automated generation of polyhedral process networks from affine nested-loop programs with dynamic loop boundsACM Transactions on Embedded Computing Systems10.1145/2536747.253675013:1s(1-24)Online publication date: 6-Dec-2013
https://dl.acm.org/doi/10.1145/2536747.2536750
Geuns SHausmans JBekooij M(2013)Sequential specification of time-aware stream processing applicationsACM Transactions on Embedded Computing Systems10.1145/2435227.243523112:1s(1-19)Online publication date: 21-Mar-2013
https://dl.acm.org/doi/10.1145/2435227.2435231
Beyranvand Nejad AMolnos AGoossens K(2013)A unified execution model for multiple computation models of streaming applications on a composable MPSoCJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2013.07.00659:10(1032-1046)Online publication date: 1-Nov-2013
https://dl.acm.org/doi/10.1016/j.sysarc.2013.07.006
Balevic AKienhuis B(2011)KPN2GPUACM SIGARCH Computer Architecture News10.1145/2082156.208217339:4(66-71)Online publication date: 19-Dec-2011
https://dl.acm.org/doi/10.1145/2082156.2082173
Zhai JNikolov HStefanov TStok LDutt NHassoun S(2011)Modeling adaptive streaming applications with parameterized polyhedral process networksProceedings of the 48th Design Automation Conference10.1145/2024724.2024752(116-121)Online publication date: 5-Jun-2011
https://dl.acm.org/doi/10.1145/2024724.2024752
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