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Methods for hierarchical automatic layout of custom LSI circuit masks

Authors:

B. T. Preas,

C. W. GwynAuthors Info & Claims

DAC '78: Proceedings of the 15th Design Automation Conference

Pages 206 - 212

Published: 19 June 1978 Publication History

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Abstract

A new automatic IC mask layout code is described which avoids most of the problems inherent in the present generation of layout codes such as lack of flexibility, inefficient use of area, and restricted design complexity. The structured hierarchical layout approach, construction graphs, and placement and routing algorithms are outlined.

References

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Cited By

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Cong JSze CDavoodi A(2014)From design to design automationProceedings of the 2014 on International symposium on physical design10.1145/2560519.2568052(121-126)Online publication date: 30-Mar-2014
https://dl.acm.org/doi/10.1145/2560519.2568052
Cai HShaklee DNewton A(1988)Connectivity biased channel construction and ordering for building-block layoutProceedings of the 25th ACM/IEEE Design Automation Conference10.5555/285730.285821(560-565)Online publication date: 1-Jun-1988
https://dl.acm.org/doi/10.5555/285730.285821
Preas BVanCleemput W(1988)Placement algorithms for arbitrarily shaped blocksPapers on Twenty-five years of electronic design automation10.1145/62882.62904(199-205)Online publication date: 1-Jun-1988
https://dl.acm.org/doi/10.1145/62882.62904
Show More Cited By

Index Terms

Methods for hierarchical automatic layout of custom LSI circuit masks
1. Hardware
  1. Electronic design automation
    1. Physical design (EDA)
2. Theory of computation
  1. Design and analysis of algorithms
    1. Approximation algorithms analysis
      1. Routing and network design problems

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Published In

DAC '78: Proceedings of the 15th Design Automation Conference

June 1978

501 pages

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IEEE Press

Publication History

Published: 19 June 1978

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

View all

Cong JSze CDavoodi A(2014)From design to design automationProceedings of the 2014 on International symposium on physical design10.1145/2560519.2568052(121-126)Online publication date: 30-Mar-2014
https://dl.acm.org/doi/10.1145/2560519.2568052
Cai HShaklee DNewton A(1988)Connectivity biased channel construction and ordering for building-block layoutProceedings of the 25th ACM/IEEE Design Automation Conference10.5555/285730.285821(560-565)Online publication date: 1-Jun-1988
https://dl.acm.org/doi/10.5555/285730.285821
Preas BVanCleemput W(1988)Placement algorithms for arbitrarily shaped blocksPapers on Twenty-five years of electronic design automation10.1145/62882.62904(199-205)Online publication date: 1-Jun-1988
https://dl.acm.org/doi/10.1145/62882.62904
Lauther U(1988)A min-cut placement algorithm for general cell assemblies based on a graph representationPapers on Twenty-five years of electronic design automation10.1145/62882.62901(182-191)Online publication date: 1-Jun-1988
https://dl.acm.org/doi/10.1145/62882.62901
Dai WSato MKuh E(1987)A dynamic and efficient representation of building-block layoutProceedings of the 24th ACM/IEEE Design Automation Conference10.1145/37888.37945(376-384)Online publication date: 1-Oct-1987
https://dl.acm.org/doi/10.1145/37888.37945
Preas BKarger PThomas D(1986)Automatic placement a review of current techniques (tutorial session)Proceedings of the 23rd ACM/IEEE Design Automation Conference10.5555/318013.318124(622-629)Online publication date: 2-Jul-1986
https://dl.acm.org/doi/10.5555/318013.318124
Persky GTran LLambert POfek HO'Neill LPistilli PLosleben PNash JShaklee DPreas BLerman H(1984)Topological routing of multi-bit data busesProceedings of the 21st Design Automation Conference10.5555/800033.800880(679-682)Online publication date: 25-Jun-1984
https://dl.acm.org/doi/10.5555/800033.800880
Supowit KSlutz E(1984)Placement algorithms for custom VLSIComputer-Aided Design10.1016/S0010-4485(84)80007-X16:1(45-50)Online publication date: 1-Jan-1984
https://dl.acm.org/doi/10.1016/S0010-4485%2884%2980007-X
Rothermel HMlynski DRadke COfek HShaklee DLosleben PNash JPistilli PLambert PPreas BLerman H(1983)Routing method for VLSI design using irregular cellsProceedings of the 20th Design Automation Conference10.5555/800032.800674(257-262)Online publication date: 27-Jun-1983
https://dl.acm.org/doi/10.5555/800032.800674
Supowit KSlutz ERadke COfek HShaklee DLosleben PNash JPistilli PLambert PPreas BLerman H(1983)Placement algorithms for custom VLSIProceedings of the 20th Design Automation Conference10.5555/800032.800658(164-170)Online publication date: 27-Jun-1983
https://dl.acm.org/doi/10.5555/800032.800658
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