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An efficient channel router

Published: 25 June 1984 Publication History

Abstract

In the LSI chip layout design, channel routing is one of the key problems. The problem is to route a specified net list between two rows of terminals across a two layer channel.
This paper presents a new routing algorithm, which is an improved version of the classical “left edge algorithm”. The new algorithm uses a row by row approach, calculating an optimum net assignment to each row.
The algorithm was implemented for examples in previously published papers. Experimental results show that the new algorithm produces optimum solutions in most cases.

References

[1]
A. Hashimoto, J. Stevens, "Wire routing by optimizing channel assignment" Proc. 8th DA Conf., 1971, pp 214-224.
[2]
T. Yoshimura, E.S. Kuh, "Efficient Algorithms for Channel Routing", IEEE Trans. on CAD of ICs and Systems, Vol. CAD-1, No 1, 1982, pp 25-35.
[3]
R.L. Rivest, Fiduccia C.M., "A 'Greedy' Channel Router" Proc. 19th DA Conf., 1982, pp 418-424.
[4]
M. Burstein, R. Pelavin, "Hierarchical Channel Router", Proc. 20th DA Conf., 1983, pp 591-597.
[5]
A. Sangiovanni-Vincentelli, M. Santomauro, "YACR: Yet Another Channel Router", Proc. IEEE Int. Symp. Circ. & Syst., 1983, pp 327-331
[6]
D. Deutsch, "A dogleg channel router", Proc. 13th DA Conf., 1976, pp 425-433.

Cited By

View all
  • (1992)An efficient routing algorithm for SOG cell generation on a dense gate-isolated layout styleProceedings of the 29th ACM/IEEE Design Automation Conference10.5555/113938.149670(676-681)Online publication date: 1-Jul-1992
  • (1992)A multi-layer channel router with new style of over-the-cell routingProceedings of the 29th ACM/IEEE Design Automation Conference10.5555/113938.149635(585-588)Online publication date: 1-Jul-1992
  • (1991)Object oriented Lisp implementation of the CHEOPS VLSI floor planning and routing systemProceedings of the 28th ACM/IEEE Design Automation Conference10.1145/127601.127677(259-264)Online publication date: 1-Jun-1991
  • Show More Cited By

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cover image ACM Conferences
DAC '84: Proceedings of the 21st Design Automation Conference
June 1984
715 pages

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IEEE Press

Publication History

Published: 25 June 1984

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DAC '84 Paper Acceptance Rate 116 of 290 submissions, 40%;
Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

View all
  • (1992)An efficient routing algorithm for SOG cell generation on a dense gate-isolated layout styleProceedings of the 29th ACM/IEEE Design Automation Conference10.5555/113938.149670(676-681)Online publication date: 1-Jul-1992
  • (1992)A multi-layer channel router with new style of over-the-cell routingProceedings of the 29th ACM/IEEE Design Automation Conference10.5555/113938.149635(585-588)Online publication date: 1-Jul-1992
  • (1991)Object oriented Lisp implementation of the CHEOPS VLSI floor planning and routing systemProceedings of the 28th ACM/IEEE Design Automation Conference10.1145/127601.127677(259-264)Online publication date: 1-Jun-1991
  • (1991)New placement and global routing algorithms for standard cell layoutsProceedings of the 27th ACM/IEEE Design Automation Conference10.1145/123186.123427(642-645)Online publication date: 3-Jan-1991
  • (1990)CHEOPSProceedings of the conference on European design automation10.5555/949970.950027(250-256)Online publication date: 12-Mar-1990
  • (1987)A practical moat routerProceedings of the 24th ACM/IEEE Design Automation Conference10.1145/37888.37921(216-222)Online publication date: 1-Oct-1987

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