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Semiconductor manufacturing scheduling: maximizing delivery performance in semiconductor wafer fabrication facilities

Published: 10 December 2000 Publication History

Abstract

This paper is motivated by the problem of scheduling customer orders (jobs) in a semiconductor fabrication facility ("wafer fab") to maximize delivery performance when the jobs have non-identical priorities (weights). As each job is typically assigned a weight based on its size, value, and/or requesting customer, a wafer fab's delivery performance can be evaluated in terms of minimizing the sum of each job's weighted tardiness. A heuristic has been proposed for obtaining "good" solutions to this complex problem. Using a "real world" wafer fab data model, the heuristic is compared to a number of dispatching rules in terms of how well each method produces job sequences that maximize delivery performance of customer orders. Results suggest that the heuristic consistently produces the best overall schedules, but there is a price to be paid in terms of solution speed.

References

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Fowler, J. W., G. Feigin, R. Leachman. 1995. Semiconductor Manufacturing Testbed: Data Sets. Arizona State University Working Paper.
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Mason, S. J., 2000. Minimizing total weighted tardiness in complex job shops. Ph.D. Dissertation, Department of Industrial Engineering, Arizona State University.
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Mason, S. J., J. W. Fowler, W. M. Carlyle. 2000. A modified shifting bottleneck heuristic for minimizing total weighted tardiness in complex job shops. Submitted to Journal of Scheduling.
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Mason, S. J., W. M. Carlyle, J. W. Fowler. 2000. A mixed-integer program for minimizing total weighted tardiness in complex job shops. Submitted to Operations Research.
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Published In

cover image ACM Conferences
WSC '00: Proceedings of the 32nd conference on Winter simulation
December 2000
2014 pages

Sponsors

  • IIE: Institute of Industrial Engineers
  • ASA: American Statistical Association
  • SIGSIM: ACM Special Interest Group on Simulation and Modeling
  • IEEE/CS: Institute of Electrical and Electronics Engineers/Computer Society
  • NIST: National Institute of Standards and Technology
  • INFORMS-CS: Institute for Operations Research and the Management Sciences-College on Simulation
  • IEEE/SMCS: Institute of Electrical and Electronics Engineers/Systems, Man, and Cybernetics Society
  • SCS: The Society for Computer Simulation International

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Society for Computer Simulation International

San Diego, CA, United States

Publication History

Published: 10 December 2000

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WSC00
Sponsor:
  • IIE
  • ASA
  • SIGSIM
  • IEEE/CS
  • NIST
  • INFORMS-CS
  • IEEE/SMCS
  • SCS
WSC00: Winter Simulation Conference
December 10 - 13, 2000
Florida, Orlando

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