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A two-step search engine for large scale boolean matching under NP3 equivalence

Published: 22 January 2018 Publication History

Abstract

Boolean matching is one of the most widely used engines in industrial applications. However, existing Boolean matching researches mainly focus on NPNP-equivalence. In this paper, we study a more practical problem of Boolean matching, which is Non-exact Projective NPNP (NP3). A two-step search engine is used to solve the problem and several heuristics and constraints are proposed to accelerate the whole process. In particular, we explore a new kind of symmetry properties in NP3 equivalence checking which helps to prune the solution space efficiently. Experimental results show that our proposed approach can achieve the best results among the winning teams of the ICCAD 2016 contest in quality within a given time limit.

References

[1]
A. Abdollahi. Signature based boolean matching in the presence of don't cares. In ACM/IEEE Design Automation Conference (DAC), pages 642--647, 2008.
[2]
A. Abdollahi and M. Pedram. A new canonical form for fast boolean matching in logic synthesis and verification. In ACM/IEEE Design Automation Conference (DAC), pages 379--384, 2005.
[3]
G. Agosta, F. Bruschi, G. Pelosi, and D. Sciuto. A unified approach to canonical form-based boolean matching. In ACM/IEEE Design Automation Conference (DAC), pages 841--846, 2007.
[4]
G. Agosta, F. Bruschi, G. Pelosi, and D. Sciuto. A transform-parametric approach to boolean matching. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 28(6):805--817, 2009.
[5]
M. Agrawal and T. Thierauf. The boolean isomorphism problem. In IEEE Symposium on Foundations of Computer Science (FOCS), pages 422--430, 1996.
[6]
L. Benini and G. De Micheli. A survey of boolean matching techniques for library binding. ACM Transactions on Design Automation of Electronic Systems (TODAES), 2(3):193--226, 1997.
[7]
B. Borchert, D. Ranjan, and F. Stephan. On the computational complexity of some classical equivalence relations on boolean functions. Theory of Computing Systems, 31(6):679--693, 1998.
[8]
J. Cong and Y.-Y. Hwang. Boolean matching for lut-based logic blocks with applications to architecture evaluation and technology mapping. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 20(9):1077--1090, 2001.
[9]
Z. Huang, L. Wang, Y. Nasikovskiy, and A. Mishchenko. Fast boolean matching based on npn classification. In FPT, pages 310--313, 2013.
[10]
H. Katebi and I. L. Markov. Large-scale boolean matching. In IEEE/ACM Proceedings Design, Automation and Test in Eurpoe (DATE), pages 771--776, 2010.
[11]
S. Krishnaswamy, H. Ren, N. Modi, and R. Puri. Deltasyn: an efficient logic difference optimizer for eco synthesis. In IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pages 789--796, 2009.
[12]
A. Kuehlmann and F. Krohm. Equivalence checking using cuts and heaps. In Proceedings of the 34th annual Design Automation Conference, pages 263--268. ACM, 1997.
[13]
C.-F. Lai, J.-H. R. Jiang, and K.-H. Wang. Boolean matching of function vectors with strengthened learning. In IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pages 596--601, 2010.
[14]
C.-F. Lai, J.-H. R. Jiang, and K.-H. Wang. Boom: a decision procedure for boolean matching with abstraction and dynamic learning. In ACM/IEEE Design Automation Conference (DAC), pages 499--504, 2010.
[15]
A. Mishchenko, S. Ray, and R. Brayton. Incremental sequential equivalence checking and subgraph isomorphism.
[16]
J. Mohnke, P. Molitor, and S. Malik. Limits of using signatures for permutation independent boolean comparison. In ACM/IEEE Design Automation Conference (DAC), pages 459--464, 1995.
[17]
J. Mohnke, P. Molitor, and S. Malik. Application of bdds in boolean matching techniques for formal logic combinational verification. International Journal on Software Tools for Technology Transfer, 3(2):207--216, 2001.
[18]
N. Sorensson and N. Een. Minisat v1.13-a sat solver with conflict-clause minimization. SAT, 2005:53, 2005.
[19]
P. Swierczynski, M. Fyrbiak, C. Paar, C. Huriaux, and R. Tessier. Protecting against cryptographic trojans in fpgas. In Field-Programmable Custom Computing Machines (FCCM), 2015 IEEE 23rd Annual International Symposium on, pages 151--154, 2015.
[20]
F. Wang, J. Zhang, L. Wu, W. Zhang, and G. Luo. Search Space Reduction for the Non-Exact Projective NPNP Boolean Matching Problem. In IEEE International Symposium on Circuits and Systems (ISCAS), pages 596--601, 2017.
[21]
C.-A. R. Wu, C.-J. J. Hsu, and K.-Y. Khoo. ICCAD-2016 CAD contest in non-exact projective NPNP boolean matching and benchmark suite. In IEEE/ACM International Conference on Computer-Aided Design (ICCAD), page 40, 2016.

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cover image ACM Conferences
ASPDAC '18: Proceedings of the 23rd Asia and South Pacific Design Automation Conference
January 2018
774 pages

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IEEE Press

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Published: 22 January 2018

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