research-article

Fast analog layout prototyping for nanometer design migration

Authors:

Hung-Ming Chen,

Tung-Chieh Chen,

Chien-Hung Chen,

Wei-Zen ChenAuthors Info & Claims

ICCAD '11: Proceedings of the International Conference on Computer-Aided Design

Pages 517 - 522

Published: 07 November 2011 Publication History

Abstract

This paper presents an analog layout migration methodology to quickly provide multiple layouts while keeping similar or better circuit performance. Unlike previous works that often generate a single layout that has exactly the same topology with the original layout, this new migration algorithm is able to provide results with different aspect ratios. First, various placement constraints, including topology, matching, and symmetry, are extracted from the original layout. The extracted constraints are hierarchically stored into a topology slicing tree. Placement is performed from the bottom tree nodes to the root tree node. In each tree node, multiple placements for the subtree are recorded. All possible placements under the constraints are recorded in the root node. This algorithm has been successfully applied to a variable gain amplifier and a folded cascode operational amplifier migrating from UMC 90nm to UMC 65nm. The experimental results validate that our approach can provide reasonable layouts, even a better result almost in no time.

References

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Cited By

Chi HTseng HLiu CChen HShin Y(2018)Performance-preserved analog routing methodology via wire load reductionProceedings of the 23rd Asia and South Pacific Design Automation Conference10.5555/3201607.3201723(482-487)Online publication date: 22-Jan-2018
https://dl.acm.org/doi/10.5555/3201607.3201723
Chin CPan PChen HChen TLin JHenkel J(2013)Efficient analog layout prototyping by layout reuse with routing preservationProceedings of the International Conference on Computer-Aided Design10.5555/2561828.2561836(40-47)Online publication date: 18-Nov-2013
https://dl.acm.org/doi/10.5555/2561828.2561836
Liao YChen YCai XLiu CChen TAyala JJones AMadden PCoskun A(2013)LASERProceedings of the 23rd ACM international conference on Great lakes symposium on VLSI10.1145/2483028.2483071(107-112)Online publication date: 2-May-2013
https://dl.acm.org/doi/10.1145/2483028.2483071
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Information & Contributors

Information

Published In

cover image ACM Conferences

ICCAD '11: Proceedings of the International Conference on Computer-Aided Design

November 2011

844 pages

ISBN:9781457713989

General Chair:
Joel Phillips
Cadence Research Labs, Berkeley, CA
,
Program Chairs:
Alan J. Hu
Univ. of British Columbia, Vancouver, BC, Canada
,
Helmut Graeb
Technische Universitaet, Munich, Germany

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
IEEE-CEDA

Publisher

IEEE Press

Publication History

Published: 07 November 2011

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Research-article

Conference

ICCAD '11

Sponsor:

SIGDA

ICCAD '11: The International Conference on Computer-Aided Design

November 7 - 10, 2011

California, San Jose

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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Citations

Cited By

Chi HTseng HLiu CChen HShin Y(2018)Performance-preserved analog routing methodology via wire load reductionProceedings of the 23rd Asia and South Pacific Design Automation Conference10.5555/3201607.3201723(482-487)Online publication date: 22-Jan-2018
https://dl.acm.org/doi/10.5555/3201607.3201723
Chin CPan PChen HChen TLin JHenkel J(2013)Efficient analog layout prototyping by layout reuse with routing preservationProceedings of the International Conference on Computer-Aided Design10.5555/2561828.2561836(40-47)Online publication date: 18-Nov-2013
https://dl.acm.org/doi/10.5555/2561828.2561836
Liao YChen YCai XLiu CChen TAyala JJones AMadden PCoskun A(2013)LASERProceedings of the 23rd ACM international conference on Great lakes symposium on VLSI10.1145/2483028.2483071(107-112)Online publication date: 2-May-2013
https://dl.acm.org/doi/10.1145/2483028.2483071
Pan PChen HCheng YLiu JHu WHu A(2012)Configurable analog routing methodology via technology and design constraint unificationProceedings of the International Conference on Computer-Aided Design10.1145/2429384.2429517(620-626)Online publication date: 5-Nov-2012
https://dl.acm.org/doi/10.1145/2429384.2429517
Wu PLin MChen YChou BChen THo TLiu BHu A(2012)Performance-driven analog placement considering monotonic current pathsProceedings of the International Conference on Computer-Aided Design10.1145/2429384.2429516(613-619)Online publication date: 5-Nov-2012
https://dl.acm.org/doi/10.1145/2429384.2429516

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